CNTVCTSS, Counter-timer Self-Synchronized Virtual Count register

The CNTVCTSS characteristics are:

Purpose

Holds the 64-bit virtual count value. The virtual count value is equal to the physical count value visible in CNTPCT minus the virtual offset visible in CNTVOFF.

Configuration

AArch32 System register CNTVCTSS bits [63:0] are architecturally mapped to AArch64 System register CNTVCTSS_EL0[63:0].

This register is present only when AArch32 is supported and FEAT_ECV is implemented. Otherwise, direct accesses to CNTVCTSS are UNDEFINED.

All reads to the CNTVCTSS occur in program order relative to reads to CNTVCT or CNTVCTSS.

This register is a self-synchronised view of the CNTVCT counter, and cannot be read speculatively.

Attributes

CNTVCTSS is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
Self-Synchronized Virtual count value
Self-Synchronized Virtual count value

Bits [63:0]

Self-Synchronized Virtual count value.

The reset behavior of this field is:

Accessing CNTVCTSS

Accesses to this register use the following encodings in the System register encoding space:

MRRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <Rt2>, <CRm>

coprocCRmopc1
0b11110b11100b1001

if PSTATE.EL == EL0 then if !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VCTEN == '0' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x04); else AArch64.AArch32SystemAccessTrap(EL1, 0x04); elsif ELUsingAArch32(EL1) && CNTKCTL.PL0VCTEN == '0' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then AArch32.TakeHypTrapException(0x00); else UNDEFINED; elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VCTEN == '0' then AArch64.AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> != '11' && CNTHCTL_EL2.EL1TVCT == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x04); else if HaveEL(EL2) && !ELUsingAArch32(EL2) && (!EL2Enabled() || HCR_EL2.<E2H,TGE> != '11') then (R[t2], R[t]) = Split(PhysicalCountInt() - CNTVOFF_EL2, 32); elsif HaveEL(EL2) && ELUsingAArch32(EL2) then (R[t2], R[t]) = Split(PhysicalCountInt() - CNTVOFF, 32); else (R[t2], R[t]) = Split(PhysicalCountInt(), 32); elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && CNTHCTL_EL2.EL1TVCT == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x04); else if HaveEL(EL2) && !ELUsingAArch32(EL2) then (R[t2], R[t]) = Split(PhysicalCountInt() - CNTVOFF_EL2, 32); elsif HaveEL(EL2) && ELUsingAArch32(EL2) then (R[t2], R[t]) = Split(PhysicalCountInt() - CNTVOFF, 32); else (R[t2], R[t]) = Split(PhysicalCountInt(), 32); elsif PSTATE.EL == EL2 then (R[t2], R[t]) = Split(PhysicalCountInt() - CNTVOFF, 32); elsif PSTATE.EL == EL3 then if HaveEL(EL2) then (R[t2], R[t]) = Split(PhysicalCountInt() - CNTVOFF, 32); else (R[t2], R[t]) = Split(PhysicalCountInt(), 32);


04/07/2023 11:24; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68

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