AT S1E2A

Performs stage 1 address translation as defined for EL2, while ignoring permissions checks from the given virtual address.

When FEAT_RME is implemented, if the Effective value of SCR_EL3.{NSE, NS} is a reserved value, this instruction is UNDEFINED at EL3.

Configuration

This instruction is present only when FEAT_ATS1A is implemented. Otherwise, direct accesses to AT S1E2A are UNDEFINED.

Attributes

Field descriptions

IA, bits [63:0]

Input address for translation. The resulting address can be read from the PAR_EL1.

Executing AT S1E2A

Accesses to this instruction use the following encodings in the System instruction encoding space:

AT S1E2A, <Xt>

op0	op1	CRn	CRm	op2
0b01	0b100	0b0111	0b1001	0b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2.NV == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else UNDEFINED; elsif PSTATE.EL == EL2 then AArch64.AT(X[t, 64], TranslationStage_1, EL2, ATAccess_Any); elsif PSTATE.EL == EL3 then if !EL2Enabled() then UNDEFINED; else AArch64.AT(X[t, 64], TranslationStage_1, EL2, ATAccess_Any);

63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
IA
IA

AT S1E2A, Address Translate Stage 1 EL2 Without Permission checks

Purpose