CNTHVS_CVAL

AArch64 System register CNTHVS_CVAL_EL2 bits [63:0] are architecturally mapped to AArch32 System register CNTHVS_CVAL[63:0].

This register is present only when FEAT_SEL2 is implemented and FEAT_VHE is implemented. Otherwise, direct accesses to CNTHVS_CVAL_EL2 are UNDEFINED.

Attributes

Field descriptions

CompareValue, bits [63:0]

Holds the Secure EL2 virtual timer CompareValue.

When CNTHVS_CTL_EL2.ENABLE is 1, the timer condition is met when (CNTVCT_EL0 - CompareValue) is greater than or equal to zero. This means that CompareValue acts like a 64-bit upcounter timer. When the timer condition is met:

CNTHVS_CTL_EL2.ISTATUS is set to 1.
If CNTHVS_CTL_EL2.IMASK is 0, an interrupt is generated.

When CNTHVS_CTL_EL2.ENABLE is 0, the timer condition is not met, but CNTVCT_EL0 continues to count.

If the Generic counter is implemented at a size less than 64 bits, then this field is permitted to be implemented at the same width as the counter, and the upper bits are RES0.

The value of this field is treated as zero-extended in all counter calculations.

The reset behavior of this field is:

On a Warm reset, this field resets to an architecturally UNKNOWN value.

Accessing CNTHVS_CVAL_EL2

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, CNTHVS_CVAL_EL2

op0	op1	CRn	CRm	op2
0b11	0b100	0b1110	0b0100	0b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if !IsCurrentSecurityState(SS_Secure) then UNDEFINED; elsif EL2Enabled() && HCR_EL2.NV == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else UNDEFINED; elsif PSTATE.EL == EL2 then if !IsCurrentSecurityState(SS_Secure) then UNDEFINED; else X[t, 64] = CNTHVS_CVAL_EL2; elsif PSTATE.EL == EL3 then if SCR_EL3.EEL2 == '0' then UNDEFINED; else X[t, 64] = CNTHVS_CVAL_EL2;

MSR CNTHVS_CVAL_EL2, <Xt>

op0	op1	CRn	CRm	op2
0b11	0b100	0b1110	0b0100	0b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if !IsCurrentSecurityState(SS_Secure) then UNDEFINED; elsif EL2Enabled() && HCR_EL2.NV == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else UNDEFINED; elsif PSTATE.EL == EL2 then if !IsCurrentSecurityState(SS_Secure) then UNDEFINED; else CNTHVS_CVAL_EL2 = X[t, 64]; elsif PSTATE.EL == EL3 then if SCR_EL3.EEL2 == '0' then UNDEFINED; else CNTHVS_CVAL_EL2 = X[t, 64];

MRS <Xt>, CNTV_CVAL_EL0

op0	op1	CRn	CRm	op2
0b11	0b011	0b1110	0b0011	0b010

if PSTATE.EL == EL0 then if !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VTEN == '0' then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL1, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VTEN == '0' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> != '11' && CNTHCTL_EL2.EL1TVT == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then X[t, 64] = CNTHVS_CVAL_EL2; elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '1' then X[t, 64] = CNTHV_CVAL_EL2; else X[t, 64] = CNTV_CVAL_EL0; elsif PSTATE.EL == EL1 then if EL2Enabled() && CNTHCTL_EL2.EL1TVT == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.<NV2,NV1,NV> == '111' then X[t, 64] = NVMem[0x168]; else X[t, 64] = CNTV_CVAL_EL0; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then X[t, 64] = CNTHVS_CVAL_EL2; elsif HCR_EL2.E2H == '1' && SCR_EL3.NS == '1' then X[t, 64] = CNTHV_CVAL_EL2; else X[t, 64] = CNTV_CVAL_EL0; elsif PSTATE.EL == EL3 then X[t, 64] = CNTV_CVAL_EL0;

MSR CNTV_CVAL_EL0, <Xt>

op0	op1	CRn	CRm	op2
0b11	0b011	0b1110	0b0011	0b010

if PSTATE.EL == EL0 then if !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VTEN == '0' then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL1, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VTEN == '0' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> != '11' && CNTHCTL_EL2.EL1TVT == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then CNTHVS_CVAL_EL2 = X[t, 64]; elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '1' then CNTHV_CVAL_EL2 = X[t, 64]; else CNTV_CVAL_EL0 = X[t, 64]; elsif PSTATE.EL == EL1 then if EL2Enabled() && CNTHCTL_EL2.EL1TVT == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.<NV2,NV1,NV> == '111' then NVMem[0x168] = X[t, 64]; else CNTV_CVAL_EL0 = X[t, 64]; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then CNTHVS_CVAL_EL2 = X[t, 64]; elsif HCR_EL2.E2H == '1' && SCR_EL3.NS == '1' then CNTHV_CVAL_EL2 = X[t, 64]; else CNTV_CVAL_EL0 = X[t, 64]; elsif PSTATE.EL == EL3 then CNTV_CVAL_EL0 = X[t, 64];

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CompareValue
CompareValue

CNTHVS_CVAL_EL2, Counter-timer Secure Virtual Timer CompareValue Register (EL2)

Purpose

Configuration