The ID_AA64PFR2_EL1 characteristics are:
For general information about the interpretation of the ID registers, see 'Principles of the ID scheme for fields in ID registers'.
Prior to the introduction of the features described by this register, this register was unnamed and reserved, RES0 from EL1, EL2, and EL3.
ID_AA64PFR2_EL1 is a 64-bit register.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | |||||||||||||||||||||||||||||||
| RES0 | MTEFAR | MTESTOREONLY | MTEPERM | ||||||||||||||||||||||||||||
Reserved, RES0.
Indicates whether FAR_ELx[63:60] are UNKNOWN on a synchronous exception due to a Tag Check Fault. Defined values are:
| MTEFAR | Meaning |
|---|---|
| 0b0000 |
On a synchronous exception due to a Tag Check Fault, FAR_ELx[63:60] are UNKNOWN. |
| 0b0001 |
On a synchronous exception due to a Tag Check Fault, FAR_ELx[63:60] are not UNKNOWN. |
All other values are reserved.
This field is valid when ID_AA64PFR1_EL1.MTE >= 0b0010.
FEAT_MTE_TAGGED_FAR implements the functionality identified by the value 0b0001.
If FEAT_MTE2 is not implemented, the value 0b0001 is not permitted.
From Armv8.9, if FEAT_MTE2 is implemented, the value 0b0000 is not permitted.
Support for Store-only Tag checking. Defined values are:
| MTESTOREONLY | Meaning |
|---|---|
| 0b0000 |
Store-only Tag checking is not supported. |
| 0b0001 |
Store-only Tag checking is supported. |
All other values are reserved.
This field is valid when ID_AA64PFR1_EL1.MTE >= 0b0010.
FEAT_MTE_STORE_ONLY implements the functionality identified by the value 0b0001.
If FEAT_MTE2 is not implemented, the value 0b0001 is not permitted.
From Armv8.9, if FEAT_MTE2 is implemented, the value 0b0000 is not permitted.
Support for Allocation tag access permissions. Defined values are:
| MTEPERM | Meaning |
|---|---|
| 0b0000 |
Allocation tag access permissions are not supported. |
| 0b0001 | Allocation tag access permissions are supported. Note NoTagAccess is supported at stage 2 of translation only. |
All other values are reserved.
This field is valid when ID_AA64PFR1_EL1.MTE >= 0b0010.
FEAT_MTE_PERM implements the functionality identified by the value 0b0001
If FEAT_MTE2 is not implemented, the value 0b0001 is not permitted.
From Armv8.9, if FEAT_MTE2 is implemented, the value 0b0000 is not permitted.
Accesses to this register use the following encodings in the System register encoding space:
| op0 | op1 | CRn | CRm | op2 |
|---|---|---|---|---|
| 0b11 | 0b000 | 0b0000 | 0b0100 | 0b010 |
if PSTATE.EL == EL0 then if IsFeatureImplemented(FEAT_IDST) then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL1, 0x18); else UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && (IsFeatureImplemented(FEAT_FGT) || !IsZero(ID_AA64PFR2_EL1) || boolean IMPLEMENTATION_DEFINED "ID_AA64PFR2_EL1 trapped by HCR_EL2.TID3") && HCR_EL2.TID3 == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else X[t, 64] = ID_AA64PFR2_EL1; elsif PSTATE.EL == EL2 then X[t, 64] = ID_AA64PFR2_EL1; elsif PSTATE.EL == EL3 then X[t, 64] = ID_AA64PFR2_EL1;
04/07/2023 11:26; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68
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