The TRCAUTHSTATUS characteristics are:
Provides information about the state of the IMPLEMENTATION DEFINED authentication interface for debug.
For additional information, see the CoreSight Architecture Specification.
AArch64 System register TRCAUTHSTATUS bits [31:0] are architecturally mapped to External register TRCAUTHSTATUS[31:0].
This register is present only when FEAT_ETE is implemented and System register access to the trace unit registers is implemented. Otherwise, direct accesses to TRCAUTHSTATUS are UNDEFINED.
TRCAUTHSTATUS is a 64-bit register.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | |||||||||||||||||||||||||||||||
| RES0 | RTNID | RTID | RES0 | RLNID | RLID | HNID | HID | SNID | SID | NSNID | NSID | ||||||||||||||||||||
Reserved, RES0.
Root non-invasive debug.
This field has the same value as DBGAUTHSTATUS_EL1.RTNID.
Root invasive debug.
| RTID | Meaning |
|---|---|
| 0b00 |
Not implemented. |
Reserved, RES0.
Realm non-invasive debug.
This field has the same value as DBGAUTHSTATUS_EL1.RLNID.
Realm invasive debug.
| RLID | Meaning |
|---|---|
| 0b00 |
Not implemented. |
Hyp Non-invasive Debug. Indicates whether a separate enable control for EL2 non-invasive debug features is implemented and enabled.
| HNID | Meaning |
|---|---|
| 0b00 |
Separate Hyp non-invasive debug enable not implemented, or EL2 non-invasive debug features not implemented. |
| 0b10 |
Implemented and disabled. |
| 0b11 |
Implemented and enabled. |
All other values are reserved.
This field reads as 0b00.
Hyp Invasive Debug. Indicates whether a separate enable control for EL2 invasive debug features is implemented and enabled.
| HID | Meaning |
|---|---|
| 0b00 |
Separate Hyp invasive debug enable not implemented, or EL2 invasive debug features not implemented. |
| 0b10 |
Implemented and disabled. |
| 0b11 |
Implemented and enabled. |
All other values are reserved.
This field reads as 0b00.
Secure Non-invasive Debug. Indicates whether Secure non-invasive debug features are implemented and enabled.
| SNID | Meaning |
|---|---|
| 0b00 |
Secure non-invasive debug features not implemented. |
| 0b10 |
Implemented and disabled. |
| 0b11 |
Implemented and enabled. |
All other values are reserved.
When EL3 is implemented, this field reads as 0b10 or 0b11 depending whether Secure non-invasive debug is enabled.
When EL3 is not implemented and the PE is Non-secure, this field reads as 0b00.
When EL3 is not implemented and the PE is Secure, this field reads as 0b10 or 0b11 depending whether Secure non-invasive debug is enabled.
Secure Invasive Debug. Indicates whether Secure invasive debug features are implemented and enabled.
| SID | Meaning |
|---|---|
| 0b00 |
Secure invasive debug features not implemented. |
| 0b10 |
Implemented and disabled. |
| 0b11 |
Implemented and enabled. |
All other values are reserved.
This field reads as 0b00.
Non-secure Non-invasive Debug. Indicates whether Non-secure non-invasive debug features are implemented and enabled.
| NSNID | Meaning |
|---|---|
| 0b00 |
Non-secure non-invasive debug features not implemented. |
| 0b10 |
Implemented and disabled. |
| 0b11 |
Implemented and enabled. |
All other values are reserved.
When EL3 is implemented, this field reads as 0b11.
When EL3 is not implemented and the PE is Non-secure, this field reads as 0b11.
When EL3 is not implemented and the PE is Secure, this field reads as 0b00.
Non-secure Invasive Debug. Indicates whether Non-secure invasive debug features are implemented and enabled.
| NSID | Meaning |
|---|---|
| 0b00 |
Non-secure invasive debug features not implemented. |
| 0b10 |
Implemented and disabled. |
| 0b11 |
Implemented and enabled. |
All other values are reserved.
This field reads as 0b00.
For implementations that support multiple access mechanisms, different access mechanisms can return different values for reads of TRCAUTHSTATUS if the authentication signals have changed and that change has not yet been synchronized by a Context synchronization event. This scenario can happen if, for example, the external debugger view is implemented separately from the system instruction view to allow for separate power domains, and so observes changes on the signals differently.
Accesses to this register use the following encodings in the System register encoding space:
| op0 | op1 | CRn | CRm | op2 |
|---|---|---|---|---|
| 0b10 | 0b001 | 0b0111 | 0b1110 | 0b110 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && CPTR_EL3.TTA == '1' then UNDEFINED; elsif CPACR_EL1.TTA == '1' then AArch64.SystemAccessTrap(EL1, 0x18); elsif EL2Enabled() && CPTR_EL2.TTA == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HDFGRTR_EL2.TRCAUTHSTATUS == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && CPTR_EL3.TTA == '1' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); elsif IsFeatureImplemented(FEAT_TRBE_EXT) && OSLSR_EL1.OSLK == '0' && HaltingAllowed() && EDSCR2.TTA == '1' then Halt(DebugHalt_SoftwareAccess); else X[t, 64] = TRCAUTHSTATUS; elsif PSTATE.EL == EL2 then if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && CPTR_EL3.TTA == '1' then UNDEFINED; elsif CPTR_EL2.TTA == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && CPTR_EL3.TTA == '1' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); elsif !ELUsingAArch32(EL1) && IsFeatureImplemented(FEAT_TRBE_EXT) && OSLSR_EL1.OSLK == '0' && HaltingAllowed() && EDSCR2.TTA == '1' then Halt(DebugHalt_SoftwareAccess); else X[t, 64] = TRCAUTHSTATUS; elsif PSTATE.EL == EL3 then if CPTR_EL3.TTA == '1' then AArch64.SystemAccessTrap(EL3, 0x18); elsif !ELUsingAArch32(EL1) && IsFeatureImplemented(FEAT_TRBE_EXT) && OSLSR_EL1.OSLK == '0' && HaltingAllowed() && EDSCR2.TTA == '1' then Halt(DebugHalt_SoftwareAccess); else X[t, 64] = TRCAUTHSTATUS;
04/07/2023 11:27; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68
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