AMCIDR2, Activity Monitors Component Identification Register 2

The AMCIDR2 characteristics are:

Purpose

Provides information to identify an activity monitors component.

For more information, see 'About the Component identification scheme'.

Configuration

It is IMPLEMENTATION DEFINED whether AMCIDR2 is implemented in the Core power domain or in the Debug power domain.

This register is present only when FEAT_AMUv1 is implemented and an implementation implements AMCIDR2. Otherwise, direct accesses to AMCIDR2 are RES0.

Attributes

AMCIDR2 is a 32-bit register.

This register is part of the AMU block.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0PRMBL_2

Bits [31:8]

Reserved, RES0.

PRMBL_2, bits [7:0]

Preamble.

Reads as 0x05.

Access to this field is RO.

Accessing AMCIDR2

Accesses to this register use the following encodings:

Accessible at offset 0xFF8 from AMU

Accesses on this interface are RO.


04/07/2023 11:27; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68

Copyright © 2010-2023 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.