The CTIDEVID characteristics are:
Describes the CTI component to the debugger.
CTIDEVID is in the Debug power domain.
CTIDEVID is a 32-bit register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | INOUT | RES0 | NUMCHAN | RES0 | NUMTRIG | RES0 | EXTMUXNUM | ||||||||||||||||||||||||
Reserved, RES0.
Input/output options. Indicates presence of the input gate. If the CTM is not implemented or CTIv2 is not implemented, this field is RAZ.
| INOUT | Meaning |
|---|---|
| 0b00 |
CTIGATE does not mask propagation of input events from external channels. |
| 0b01 |
CTIGATE masks propagation of input events from external channels. |
All other values are reserved.
Reserved, RES0.
Number of ECT channels implemented. For Armv8, valid values are:
and so on up to 0b100000, 32 channels (0..31) implemented.
All other values are reserved.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Reserved, RES0.
Upper bound for number of triggers. The indices of all implemented input and output triggers are less than this value.
All other values are reserved. If the PE contains a Trace extension, this field must be at least 0b001000. There is no guarantee that all of the input and output triggers, including the highest numbered, are connected to any components, or that the implementation of input and output triggers is symmetrical.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
Reserved, RES0.
Number of multiplexors available on triggers. This value is used in conjunction with External Control register, ASICCTL.
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
| Component | Offset | Instance |
|---|---|---|
| CTI | 0xFC8 | CTIDEVID |
Accesses on this interface are RO.
04/07/2023 11:26; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68
Copyright © 2010-2023 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.