EDLSR

The optional Software Lock provides a lock to prevent memory-mapped writes to the debug registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the debug registers. It does not, and cannot, prevent all accidental or malicious damage.

Configuration

When FEAT_DoPD is implemented, EDLSR is in the Core power domain. Otherwise, EDLSR is in the Debug power domain.

If FEAT_DoPD is implemented, Software Lock is not implemented by the architecturally-defined debug components of the PE.

Software uses EDLAR to set or clear the lock, and EDLSR to check the current status of the lock.

Attributes

Field descriptions

Bits [31:3]

nTT, bit [2]

Not thirty-two bit access required. RAZ.

SLK, bit [1]
When Software Lock is implemented:

Software Lock status for this component. For an access to LSR that is not a memory-mapped access, or when Software Lock is not implemented, this field is RES0.

For memory-mapped accesses when Software Lock is implemented, possible values of this field are:

SLK	Meaning
0b0	Lock clear. Writes are permitted to this component's registers.
0b1	Lock set. Writes to this component's registers are ignored, and reads have no side effects.

The reset behavior of this field is:

On a Cold reset, when FEAT_DoPD is implemented, this field resets to 1.
On an External debug reset, when FEAT_DoPD is not implemented, this field resets to 1.

Otherwise:

SLI, bit [0]

Software Lock implemented. For an access to LSR that is not a memory-mapped access, this field is RAZ. For memory-mapped accesses, the value of this field is IMPLEMENTATION DEFINED. Permitted values are:

SLI	Meaning
0b0	Software Lock not implemented or not memory-mapped access.
0b1	Software Lock implemented and memory-mapped access.

Accessing EDLSR

EDLSR can be accessed through the memory-mapped interfaces:

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
RES0																													nTT	SLK	SLI

EDLSR, External Debug Lock Status Register

Purpose

Configuration

Attributes

Field descriptions

Bits [31:3]

nTT, bit [2]

SLK, bit [1]
When Software Lock is implemented:

Otherwise:

SLI, bit [0]

Accessing EDLSR

EDLSR can be accessed through the memory-mapped interfaces:

EDLSR, External Debug Lock Status Register

Purpose

Configuration

Attributes

Field descriptions

Bits [31:3]

nTT, bit [2]

SLK, bit [1]When Software Lock is implemented:

Otherwise:

SLI, bit [0]

Accessing EDLSR

EDLSR can be accessed through the memory-mapped interfaces:

SLK, bit [1]
When Software Lock is implemented: