The GITS_SGIR characteristics are:
Written by software to signal a virtual SGI for translation by the ITS.
This register is present only when FEAT_GICv4p1 is implemented. Otherwise, direct accesses to GITS_SGIR are RES0.
This register is provided only in FEAT_GICv4p1 implementations.
GITS_SGIR is a 64-bit register.
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | vPEID | ||||||||||||||||||||||||||||||
| RES0 | vINTID | ||||||||||||||||||||||||||||||
Reserved, RES0.
ID of target vPEID.
The size of this field is IMPLEMENTATION DEFINED, and is specified by the GICD_TYPER2.VIL and GICD_TYPER2.VID fields. Unimplemented bits are RES0.
Reserved, RES0.
INTID of virtual SGI.
64-bit access only.
| Component | Offset |
|---|---|
| GIC ITS control | 0x20020 |
Accesses on this interface are WO.
04/07/2023 11:22; 1b994cb0b8c6d1ae5a9a15edbc8bd6ce3b5c7d68
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