Lines Matching refs:esp
36 movl 16(%esp), %edx # Copy args pushed by PLT in register. Note
37 movl 12(%esp), %eax # that `fixup' takes its parameters in regs.
64 movl (%esp), %edx # Get register content back.
66 movl 4(%esp), %eax # Get register content back.
67 addl $16, %esp # Adjust stack: PLT1 + PLT2 + %eax + %edx
82 pushl %esp
84 addl $8, (%esp) # Account for the pushed PLT data
93 movl %esp, %ecx
94 subl $8, %esp
96 movl $-1, 4(%esp)
97 leal 4(%esp), %edx
98 movl %edx, (%esp)
101 movl 40(%esp), %ecx # Load return address
102 movl 36(%esp), %edx # Copy args pushed by PLT in register. Note
103 movl 32(%esp), %eax # that `fixup' takes its parameters in regs.
151 movl (%esp), %edx
158 movl (%esp), %ecx
159 movl %eax, (%esp) # Store the function address.
160 movl 4(%esp), %eax
175 1: movl %ebx, (%esp)
184 leal 44(%esp), %esi
189 movl %esp, %edi
191 movl %esp, %ebx
193 movl %edi, %esp
220 movl %ebx, %esp
221 cfi_def_cfa_register (esp)
222 movl 8(%esp), %ebx
241 subl $(LRV_SIZE - 12), %esp
243 movl %eax, LRV_EAX_OFFSET(%esp)
244 movl %edx, LRV_EDX_OFFSET(%esp)
245 fstpt LRV_ST0_OFFSET(%esp)
246 fstpt LRV_ST1_OFFSET(%esp)
247 pushl %esp
250 leal (LRV_SIZE + 4)(%esp), %ecx
252 movl (LRV_SIZE + 4 + LR_SIZE)(%esp), %eax
254 movl (LRV_SIZE + 4 + LR_SIZE + 4)(%esp), %edx
256 movl LRV_EAX_OFFSET(%esp), %eax
257 movl LRV_EDX_OFFSET(%esp), %edx
258 fldt LRV_ST1_OFFSET(%esp)
259 fldt LRV_ST0_OFFSET(%esp)
261 addl $(LRV_SIZE + 4 + LR_SIZE + 4), %esp