/sysdeps/alpha/ |
A D | stxcpy.S | 89 bne t6, 1f # .. e1 (zdb) 94 subq t8, 1, t6 # .. e1 : 96 or t8, t6, t7 # .. e1 : 145 or t1, t6, t6 # e0 : 150 mskql t6, a1, t6 # e0 : mask out the bits we have 220 and t6, t7, t8 # e1 : 227 or t6, t8, t7 # e0 : 248 mov zero, t6 # e0 : 251 lda t6, -1 # .. e1 : 252 mskql t6, a0, t6 # e0 : [all …]
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A D | stxncpy.S | 107 subq t8, 1, t6 # .. e1 : 108 or t8, t6, t7 # e0 : 171 or t0, t6, t6 # e1 : mask original data for zero test 174 lda t6, -1 # e0 : 177 mskql t6, a1, t6 # e0 : mask out bits already seen 264 or t6, t8, t7 # e0 : 277 sll t10, t6, t6 # e0 : 278 and t6, 0xff, t6 # e0 : 306 mov zero, t6 # e0 : 309 lda t6, -1 # .. e1 : [all …]
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A D | strrchr.S | 42 mov zero, t6 # .. e1 : t6 is last match aligned addr 65 cmovne t3, v0, t6 # .. e1 : save previous comparisons match 82 cmovne t3, v0, t6 # e0 : 99 addq t6, t0, v0 # .. e1 : add our aligned base ptr to the mix
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A D | strncmp.S | 52 srl t3, 1, t6 55 cmovlt a2, t6, a2 # bound neg count to LONG_MAX 246 negq t7, t6 # create bytemask of valid data 247 and t6, t7, t8 248 subq t8, 1, t6 249 or t6, t8, t7
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A D | _mcount.S | 64 stq t6, 0x78(sp) 91 ldq t6, 0x78(sp)
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A D | strcmp.S | 168 negq t7, t6 # e0 : create bytemask of valid data 169 and t6, t7, t8 # e1 : 170 subq t8, 1, t6 # e0 : 171 or t6, t8, t7 # e1 :
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/sysdeps/alpha/alphaev6/ |
A D | stxcpy.S | 93 bne t6, 1f # U : (stall) 98 subq t8, 1, t6 # E : 100 or t8, t6, t10 # E : (stall) 157 or t1, t6, t6 # E : 162 mskql t6, a1, t6 # U : mask out the bits we have 238 bne t6, 1f # U : (stall) 241 subq t8, 1, t6 # E : 266 mov zero, t6 # E : 269 lda t6, -1 # E : 271 mskql t6, a0, t6 # U : [all …]
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A D | stxncpy.S | 120 subq t8, 1, t6 # E : 200 or t0, t6, t6 # E : mask original data for zero test (stall) 204 lda t6, -1 # E : 208 mskql t6, a1, t6 # U : mask out bits already seen 297 subq t8, 1, t6 # E : 313 and a1, 7, t6 # E : 314 sll t10, t6, t6 # U : (stall) 315 and t6, 0xff, t6 # E : (stall) 341 mov zero, t6 # E : 344 lda t6, -1 # E : [all …]
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/sysdeps/mips/sys/ |
A D | regdef.h | 54 #define t6 $14 macro 58 #define ta2 t6
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/sysdeps/alpha/alphaev67/ |
A D | strrchr.S | 43 mov zero, t6 # E : t6 is last match aligned addr 71 cmovne t3, v0, t6 # E : save previous comparisons match 97 cmovne t3, v0, t6 # E : 108 addq t6, t5, v0 # E : and add to quadword address
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/sysdeps/unix/sysv/linux/alpha/alpha/ |
A D | regdef.h | 12 #define t6 $7 macro
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/sysdeps/ia64/fpu/ |
A D | libm_support.h | 580 t32,t1,t2,t3,t4,t5,t6) \ argument 582 t1=(y)*(t32); t5=y-t1; t5=t5+t1; t6=y-t5; \ 584 t2=(t3)*(t6)+(t4)*(t5); \ 586 rlo=t1-rhi; rlo=rlo+t2; rlo=rlo+(t4*t6); 595 t32,t1,t2,t3,t4,t5,t6,t7,t8) \ argument 596 __LIBM_MULL1_K80(t7,t8,xhi,yhi, t32,t1,t2,t3,t4,t5,t6) \ 611 t32,t1,t2,t3,t4,t5,t6,t7,t8) 629 __LIBM_MULL_K80(r,x,y, t32,t1,t2,t3,t4,t5,t6,t7,t8) 657 t32,t1,t2,t3,t4,t5,t6,t7,t8,t9) 675 __LIBM_DIVL_K80(r,x,y, t32,t1,t2,t3,t4,t5,t6,t7,t8,t9) [all …]
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/sysdeps/sparc/sparc32/ |
A D | memcpy.S | 27 ldd [%src + offset + 0x18], %t6; \ 34 st %t6, [%dst + offset + 0x18]; \ 45 std %t6, [%dst + offset + 0x18]; 71 srl %t1, shir, %t6; \ 75 or %t6, %t0, %t0; \ 77 srl %t3, shir, %t6; \ 83 or %t6, %t2, %t4; 90 sll %t0, shil, %t6; \ 93 or %t5, %t6, %t1; \ 96 sll %t2, shil, %t6; \ [all …]
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/sysdeps/ieee754/dbl-64/ |
A D | e_lgamma_r.c | 113 t6 = 6.10053870246291332635e-03, /* 0x3F78FCE0, 0xE370E344 */ variable 265 p1 = t0+w*(t3+w*(t6+w*(t9 +w*t12))); /* parallel comp */ in __ieee754_lgamma_r()
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/sysdeps/ieee754/flt-32/ |
A D | e_lgammaf_r.c | 48 t6 = 6.1005386524e-03, /* 0x3bc7e707 */ variable 200 p1 = t0+w*(t3+w*(t6+w*(t9 +w*t12))); /* parallel comp */ in __ieee754_lgammaf_r()
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/sysdeps/mips/ |
A D | memcpy.S | 211 # define REG6 t6
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