1 /* 68k FPU control word definitions. 2 Copyright (C) 1996-2021 Free Software Foundation, Inc. 3 This file is part of the GNU C Library. 4 5 The GNU C Library is free software; you can redistribute it and/or 6 modify it under the terms of the GNU Lesser General Public 7 License as published by the Free Software Foundation; either 8 version 2.1 of the License, or (at your option) any later version. 9 10 The GNU C Library is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 Lesser General Public License for more details. 14 15 You should have received a copy of the GNU Lesser General Public 16 License along with the GNU C Library. If not, see 17 <https://www.gnu.org/licenses/>. */ 18 19 #ifndef _FPU_CONTROL_H 20 #define _FPU_CONTROL_H 21 22 /* 23 * Motorola floating point control register bits. 24 * 25 * 31-16 -> reserved (read as 0, ignored on write) 26 * 15 -> enable trap for BSUN exception 27 * 14 -> enable trap for SNAN exception 28 * 13 -> enable trap for OPERR exception 29 * 12 -> enable trap for OVFL exception 30 * 11 -> enable trap for UNFL exception 31 * 10 -> enable trap for DZ exception 32 * 9 -> enable trap for INEX2 exception (INEX on Coldfire) 33 * 8 -> enable trap for INEX1 exception (IDE on Coldfire) 34 * 7-6 -> Precision Control (only bit 6 is used on Coldfire) 35 * 5-4 -> Rounding Control 36 * 3-0 -> zero (read as 0, write as 0) 37 * 38 * 39 * Precision Control: 40 * 00 - round to extended precision 41 * 01 - round to single precision 42 * 10 - round to double precision 43 * 11 - undefined 44 * 45 * Rounding Control: 46 * 00 - rounding to nearest (RN) 47 * 01 - rounding toward zero (RZ) 48 * 10 - rounding (down)toward minus infinity (RM) 49 * 11 - rounding (up) toward plus infinity (RP) 50 * 51 * The hardware default is 0x0000. I choose 0x5400. 52 */ 53 54 #include <features.h> 55 56 #if defined (__mcoldfire__) && !defined (__mcffpu__) 57 58 # define _FPU_RESERVED 0xffffffff 59 # define _FPU_DEFAULT 0x00000000 60 # define _FPU_GETCW(cw) ((cw) = 0) 61 # define _FPU_SETCW(cw) ((void) (cw)) 62 63 #else 64 65 /* masking of interrupts */ 66 # define _FPU_MASK_BSUN 0x8000 67 # define _FPU_MASK_SNAN 0x4000 68 # define _FPU_MASK_OPERR 0x2000 69 # define _FPU_MASK_OVFL 0x1000 70 # define _FPU_MASK_UNFL 0x0800 71 # define _FPU_MASK_DZ 0x0400 72 # define _FPU_MASK_INEX1 0x0200 73 # define _FPU_MASK_INEX2 0x0100 74 75 /* precision control */ 76 # ifdef __mcoldfire__ 77 # define _FPU_DOUBLE 0x00 78 # else 79 # define _FPU_EXTENDED 0x00 /* RECOMMENDED */ 80 # define _FPU_DOUBLE 0x80 81 # endif 82 # define _FPU_SINGLE 0x40 /* DO NOT USE */ 83 84 /* rounding control */ 85 # define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */ 86 # define _FPU_RC_ZERO 0x10 87 # define _FPU_RC_DOWN 0x20 88 # define _FPU_RC_UP 0x30 89 90 # ifdef __mcoldfire__ 91 # define _FPU_RESERVED 0xFFFF800F 92 # else 93 # define _FPU_RESERVED 0xFFFF000F /* Reserved bits in fpucr */ 94 # endif 95 96 97 /* Now two recommended fpucr */ 98 99 /* The fdlibm code requires no interrupts for exceptions. Don't 100 change the rounding mode, it would break long double I/O! */ 101 # define _FPU_DEFAULT 0x00000000 102 103 /* IEEE: same as above, but exceptions. We must make it non-zero so 104 that __setfpucw works. This bit will be ignored. */ 105 # define _FPU_IEEE 0x00000001 106 107 /* Macros for accessing the hardware control word. */ 108 # define _FPU_GETCW(cw) __asm__ ("fmove%.l %!, %0" : "=dm" (cw)) 109 # define _FPU_SETCW(cw) __asm__ volatile ("fmove%.l %0, %!" : : "dm" (cw)) 110 #endif 111 112 /* Type of the control word. */ 113 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__))); 114 115 /* Default control word set at startup. */ 116 extern fpu_control_t __fpu_control; 117 118 #endif /* _M68K_FPU_CONTROL_H */ 119