1 #include <fenv.h> 2 #include <fpu_control.h> 3 4 #define _FP_W_TYPE_SIZE 64 5 #define _FP_W_TYPE unsigned long long 6 #define _FP_WS_TYPE signed long long 7 #define _FP_I_TYPE long long 8 9 #define _FP_MUL_MEAT_S(R,X,Y) \ 10 _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y) 11 #define _FP_MUL_MEAT_D(R,X,Y) \ 12 _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) 13 #define _FP_MUL_MEAT_Q(R,X,Y) \ 14 _FP_MUL_MEAT_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) 15 16 #define _FP_MUL_MEAT_DW_S(R,X,Y) \ 17 _FP_MUL_MEAT_DW_1_imm(_FP_WFRACBITS_S,R,X,Y) 18 #define _FP_MUL_MEAT_DW_D(R,X,Y) \ 19 _FP_MUL_MEAT_DW_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) 20 #define _FP_MUL_MEAT_DW_Q(R,X,Y) \ 21 _FP_MUL_MEAT_DW_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) 22 23 #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm) 24 #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y) 25 #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) 26 27 #ifdef __mips_nan2008 28 # define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) 29 # define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) 30 # define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 31 #else 32 # define _FP_NANFRAC_S (_FP_QNANBIT_S - 1) 33 # define _FP_NANFRAC_D (_FP_QNANBIT_D - 1) 34 # define _FP_NANFRAC_Q (_FP_QNANBIT_Q - 1), -1 35 #endif 36 #define _FP_NANSIGN_S 0 37 #define _FP_NANSIGN_D 0 38 #define _FP_NANSIGN_Q 0 39 40 #define _FP_KEEPNANFRACP 1 41 #ifdef __mips_nan2008 42 # define _FP_QNANNEGATEDP 0 43 #else 44 # define _FP_QNANNEGATEDP 1 45 #endif 46 47 #ifdef __mips_nan2008 48 /* NaN payloads should be preserved for NAN2008. */ 49 # define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ 50 do \ 51 { \ 52 R##_s = X##_s; \ 53 _FP_FRAC_COPY_##wc (R, X); \ 54 R##_c = FP_CLS_NAN; \ 55 } \ 56 while (0) 57 #else 58 /* From my experiments it seems X is chosen unless one of the 59 NaNs is sNaN, in which case the result is NANSIGN/NANFRAC. */ 60 # define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ 61 do { \ 62 if ((_FP_FRAC_HIGH_RAW_##fs(X) \ 63 | _FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs) \ 64 { \ 65 R##_s = _FP_NANSIGN_##fs; \ 66 _FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs); \ 67 } \ 68 else \ 69 { \ 70 R##_s = X##_s; \ 71 _FP_FRAC_COPY_##wc(R,X); \ 72 } \ 73 R##_c = FP_CLS_NAN; \ 74 } while (0) 75 #endif 76 77 #define _FP_TININESS_AFTER_ROUNDING 1 78 79 #ifdef __mips_hard_float 80 81 #define _FP_DECL_EX fpu_control_t _fcw 82 83 #define FP_ROUNDMODE (_fcw & 0x3) 84 85 #define FP_RND_NEAREST FE_TONEAREST 86 #define FP_RND_ZERO FE_TOWARDZERO 87 #define FP_RND_PINF FE_UPWARD 88 #define FP_RND_MINF FE_DOWNWARD 89 90 #define FP_EX_INVALID FE_INVALID 91 #define FP_EX_OVERFLOW FE_OVERFLOW 92 #define FP_EX_UNDERFLOW FE_UNDERFLOW 93 #define FP_EX_DIVZERO FE_DIVBYZERO 94 #define FP_EX_INEXACT FE_INEXACT 95 96 #define FP_INIT_ROUNDMODE \ 97 do { \ 98 _FPU_GETCW (_fcw); \ 99 } while (0) 100 101 #define FP_HANDLE_EXCEPTIONS \ 102 do { \ 103 if (__builtin_expect (_fex, 0)) \ 104 _FPU_SETCW (_fcw | _fex | (_fex << 10)); \ 105 } while (0) 106 #define FP_TRAPPING_EXCEPTIONS ((_fcw >> 5) & 0x7c) 107 #endif 108