1 /* Dump registers.
2    Copyright (C) 1998-2021 Free Software Foundation, Inc.
3    This file is part of the GNU C Library.
4 
5    The GNU C Library is free software; you can redistribute it and/or
6    modify it under the terms of the GNU Lesser General Public
7    License as published by the Free Software Foundation; either
8    version 2.1 of the License, or (at your option) any later version.
9 
10    The GNU C Library is distributed in the hope that it will be useful,
11    but WITHOUT ANY WARRANTY; without even the implied warranty of
12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13    Lesser General Public License for more details.
14 
15    You should have received a copy of the GNU Lesser General Public
16    License along with the GNU C Library; if not, see
17    <https://www.gnu.org/licenses/>.  */
18 
19 #include <sys/uio.h>
20 #include <_itoa.h>
21 
22 /* This prints out the information in the following form: */
23 static const char dumpform[] = "\
24 Register dump:\n\
25 sr0=000000000000020% sr1=000000000000021% dar=000000000000029% dsi=000002a%\n\
26 lr=000000000000024%  ctr=000000000000023% gr3*=000000000000022% trap=0000028%\n\
27 ccr=0000026%  xer=0000025%\n\
28 gr0-3:   000000000000000% 000000000000001% 000000000000002% 000000000000003%\n\
29 gr4-7:   000000000000004% 000000000000005% 000000000000006% 000000000000007%\n\
30 gr8-11:  000000000000008% 000000000000009% 00000000000000a% 00000000000000b%\n\
31 gr12-15: 00000000000000c% 00000000000000d% 00000000000000e% 00000000000000f%\n\
32 gr16-19: 000000000000010% 000000000000011% 000000000000012% 000000000000013%\n\
33 gr20-23: 000000000000014% 000000000000015% 000000000000016% 000000000000017%\n\
34 gr24-27: 000000000000018% 000000000000019% 00000000000001a% 00000000000001b%\n\
35 gr28-31: 00000000000001c% 00000000000001d% 00000000000001e% 00000000000001f%\n\
36 fscr=000000000000050%\n\
37 fp0-3:   000000000000030% 000000000000031% 000000000000032% 000000000000033%\n\
38 fp4-7:   000000000000034% 000000000000035% 000000000000036% 000000000000037%\n\
39 fp8-11:  000000000000038% 000000000000038% 00000000000003a% 00000000000003b%\n\
40 fp12-15: 00000000000003c% 00000000000003d% 00000000000003e% 00000000000003f%\n\
41 fp16-19: 000000000000040% 000000000000041% 000000000000042% 000000000000043%\n\
42 fp20-23: 000000000000044% 000000000000045% 000000000000046% 000000000000047%\n\
43 fp24-27: 000000000000048% 000000000000049% 00000000000004a% 00000000000004b%\n\
44 fp28-31: 00000000000004c% 00000000000004d% 00000000000004e% 00000000000004f%\n\
45 ";
46 
47 /* Most of the fields are self-explanatory.  'sr0' is the next
48    instruction to execute, from SRR0, which may have some relationship
49    with the instruction that caused the exception.  'r3*' is the value
50    that will be returned in register 3 when the current system call
51    returns.  'sr1' is SRR1, bits 16-31 of which are copied from the MSR:
52 
53    16 - External interrupt enable
54    17 - Privilege level (1=user, 0=supervisor)
55    18 - FP available
56    19 - Machine check enable (if clear, processor locks up on machine check)
57    20 - FP exception mode bit 0 (FP exceptions recoverable)
58    21 - Single-step trace enable
59    22 - Branch trace enable
60    23 - FP exception mode bit 1
61    25 - exception prefix (if set, exceptions are taken from 0xFFFnnnnn,
62         otherwise from 0x000nnnnn).
63    26 - Instruction address translation enabled.
64    27 - Data address translation enabled.
65    30 - Exception is recoverable (otherwise, don't try to return).
66    31 - Little-endian mode enable.
67 
68    'Trap' is the address of the exception:
69 
70    00200 - Machine check exception (memory parity error, for instance)
71    00300 - Data access exception (memory not mapped, see dsisr for why)
72    00400 - Instruction access exception (memory not mapped)
73    00500 - External interrupt
74    00600 - Alignment exception (see dsisr for more information)
75    00700 - Program exception (illegal/trap instruction, FP exception)
76    00800 - FP unavailable (should not be seen by user code)
77    00900 - Decrementer exception (for instance, SIGALRM)
78    00A00 - I/O controller interface exception
79    00C00 - System call exception (for instance, kill(3)).
80    00E00 - FP assist exception (optional FP instructions, etc.)
81 
82    'dar' is the memory location, for traps 00300, 00400, 00600, 00A00.
83    'dsisr' has the following bits under trap 00300:
84    0 - direct-store error exception
85    1 - no page table entry for page
86    4 - memory access not permitted
87    5 - trying to access I/O controller space or using lwarx/stwcx on
88        non-write-cached memory
89    6 - access was store
90    9 - data access breakpoint hit
91    10 - segment table search failed to find translation (64-bit ppcs only)
92    11 - I/O controller instruction not permitted
93    For trap 00400, the same bits are set in SRR1 instead.
94    For trap 00600, bits 12-31 of the DSISR set to allow emulation of
95    the instruction without actually having to read it from memory.
96 */
97 
98 #define xtoi(x) (x >= 'a' ? x + 10 - 'a' : x - '0')
99 
100 static void
register_dump(int fd,struct sigcontext * ctx)101 register_dump (int fd, struct sigcontext *ctx)
102 {
103   char buffer[sizeof (dumpform)];
104   char *bufferpos;
105   unsigned regno;
106   unsigned long *regs = (unsigned long *)(ctx->regs);
107 
108   memcpy(buffer, dumpform, sizeof (dumpform));
109 
110   /* Generate the output.  */
111   while ((bufferpos = memchr (buffer, '%', sizeof (dumpform))))
112     {
113       regno = xtoi (bufferpos[-1]) | xtoi (bufferpos[-2]) << 4;
114       memset (bufferpos-2, '0', 3);
115       _itoa_word (regs[regno], bufferpos+1, 16, 0);
116     }
117 
118   /* Write the output.  */
119   write (fd, buffer, sizeof (buffer) - 1);
120 }
121 
122 
123 #define REGISTER_DUMP \
124   register_dump (fd, ctx)
125