Lines Matching refs:clocks
15 clocks {
46 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
55 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
76 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
85 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
106 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
115 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
136 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
144 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
165 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
174 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
189 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
198 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
214 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM12)>;
236 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
252 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
266 clocks = <&rcc 1 CLK_RTC>;
267 assigned-clocks = <&rcc 1 CLK_RTC>;
279 clocks = <&rcc 1 CLK_USART2>;
287 clocks = <&rcc 1 CLK_USART3>;
295 clocks = <&rcc 1 CLK_UART4>;
303 clocks = <&rcc 1 CLK_UART5>;
313 clocks = <&rcc 1 CLK_I2C1>;
326 clocks = <&rcc 1 CLK_I2C2>;
339 clocks = <&rcc 1 CLK_I2C3>;
352 clocks = <&rcc 1 CLK_I2C4>;
363 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
372 clocks = <&rcc 1 CLK_UART7>;
380 clocks = <&rcc 1 CLK_UART8>;
389 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM1)>;
411 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM8)>;
432 clocks = <&rcc 1 CLK_USART1>;
440 clocks = <&rcc 1 CLK_USART6>;
448 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
459 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
484 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM9)>;
506 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
522 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
541 clocks = <&rcc 0 12>;
550 clocks = <&clk_hse>, <&clk_i2s_ckin>;
552 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
567 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
583 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
593 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
605 clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
613 clocks = <&rcc 1 0>;