Lines Matching refs:dev_index
693 static unsigned long exynos4_get_uart_clk(int dev_index) in exynos4_get_uart_clk() argument
711 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4_get_uart_clk()
732 ratio = (ratio >> (dev_index << 2)) & 0xf; in exynos4_get_uart_clk()
740 static unsigned long exynos4x12_get_uart_clk(int dev_index) in exynos4x12_get_uart_clk() argument
757 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4x12_get_uart_clk()
777 ratio = (ratio >> (dev_index << 2)) & 0xf; in exynos4x12_get_uart_clk()
784 static unsigned long exynos4_get_mmc_clk(int dev_index) in exynos4_get_mmc_clk() argument
793 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4_get_mmc_clk()
804 switch (dev_index) { in exynos4_get_mmc_clk()
823 if (dev_index == 1 || dev_index == 3) in exynos4_get_mmc_clk()
834 static void exynos4_set_mmc_clk(int dev_index, unsigned int div) in exynos4_set_mmc_clk() argument
848 if (dev_index < 2) { in exynos4_set_mmc_clk()
850 clear_bit = MASK_PRE_RATIO(dev_index); in exynos4_set_mmc_clk()
851 set_bit = SET_PRE_RATIO(dev_index, div); in exynos4_set_mmc_clk()
852 } else if (dev_index == 4) { in exynos4_set_mmc_clk()
854 dev_index -= 4; in exynos4_set_mmc_clk()
856 clear_bit = MASK_RATIO(dev_index); in exynos4_set_mmc_clk()
857 set_bit = SET_RATIO(dev_index, div); in exynos4_set_mmc_clk()
860 dev_index -= 2; in exynos4_set_mmc_clk()
861 clear_bit = MASK_PRE_RATIO(dev_index); in exynos4_set_mmc_clk()
862 set_bit = SET_PRE_RATIO(dev_index, div); in exynos4_set_mmc_clk()
869 static void exynos5_set_mmc_clk(int dev_index, unsigned int div) in exynos5_set_mmc_clk() argument
881 if (dev_index < 2) { in exynos5_set_mmc_clk()
885 dev_index -= 2; in exynos5_set_mmc_clk()
888 clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), in exynos5_set_mmc_clk()
889 (div & 0xff) << ((dev_index << 4) + 8)); in exynos5_set_mmc_clk()
893 static void exynos5420_set_mmc_clk(int dev_index, unsigned int div) in exynos5420_set_mmc_clk() argument
907 shift = dev_index * 10; in exynos5420_set_mmc_clk()
1640 unsigned long get_uart_clk(int dev_index) in get_uart_clk() argument
1644 switch (dev_index) { in get_uart_clk()
1658 debug("%s: invalid UART index %d", __func__, dev_index); in get_uart_clk()
1666 return exynos4x12_get_uart_clk(dev_index); in get_uart_clk()
1667 return exynos4_get_uart_clk(dev_index); in get_uart_clk()
1673 unsigned long get_mmc_clk(int dev_index) in get_mmc_clk() argument
1678 return exynos4_get_mmc_clk(dev_index); in get_mmc_clk()
1680 switch (dev_index) { in get_mmc_clk()
1694 debug("%s: invalid MMC index %d", __func__, dev_index); in get_mmc_clk()
1701 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk() argument
1709 exynos5420_set_mmc_clk(dev_index, div); in set_mmc_clk()
1711 exynos5_set_mmc_clk(dev_index, div); in set_mmc_clk()
1713 exynos4_set_mmc_clk(dev_index, div); in set_mmc_clk()