Lines Matching refs:eth

150 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_send()  local
151 	struct ravb_desc *desc = &eth->tx_desc[eth->tx_desc_idx];  in ravb_send()
162 	if (!(readl(eth->iobase + RAVB_REG_TCCR) & TCCR_TSRQ0))  in ravb_send()
163 		setbits_le32(eth->iobase + RAVB_REG_TCCR, TCCR_TSRQ0);  in ravb_send()
177 	eth->tx_desc_idx = (eth->tx_desc_idx + 1) % (RAVB_NUM_TX_DESC - 1);  in ravb_send()
183 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_recv()  local
184 	struct ravb_rxdesc *desc = &eth->rx_desc[eth->rx_desc_idx];  in ravb_recv()
209 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_free_pkt()  local
210 	struct ravb_rxdesc *desc = &eth->rx_desc[eth->rx_desc_idx];  in ravb_free_pkt()
217 	eth->rx_desc_idx = (eth->rx_desc_idx + 1) % RAVB_NUM_RX_DESC;  in ravb_free_pkt()
218 	desc = &eth->rx_desc[eth->rx_desc_idx];  in ravb_free_pkt()
226 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_reset()  local
229 	writel(CCC_OPC_CONFIG, eth->iobase + RAVB_REG_CCC);  in ravb_reset()
232 	return wait_for_bit_le32(eth->iobase + RAVB_REG_CSR,  in ravb_reset()
236 static void ravb_base_desc_init(struct ravb_priv *eth)  in ravb_base_desc_init()  argument
242 	memset(eth->base_desc, 0x0, desc_size);  in ravb_base_desc_init()
245 		eth->base_desc[i].ctrl = RAVB_DESC_DT_EOS;  in ravb_base_desc_init()
247 	ravb_flush_dcache((uintptr_t)eth->base_desc, desc_size);  in ravb_base_desc_init()
250 	writel((uintptr_t)eth->base_desc, eth->iobase + RAVB_REG_DBAT);  in ravb_base_desc_init()
253 static void ravb_tx_desc_init(struct ravb_priv *eth)  in ravb_tx_desc_init()  argument
259 	memset(eth->tx_desc, 0x0, desc_size);  in ravb_tx_desc_init()
260 	eth->tx_desc_idx = 0;  in ravb_tx_desc_init()
263 		eth->tx_desc[i].ctrl = RAVB_DESC_DT_EEMPTY;  in ravb_tx_desc_init()
266 	eth->tx_desc[RAVB_NUM_TX_DESC - 1].ctrl = RAVB_DESC_DT_LINKFIX;  in ravb_tx_desc_init()
267 	eth->tx_desc[RAVB_NUM_TX_DESC - 1].dptr = (uintptr_t)eth->tx_desc;  in ravb_tx_desc_init()
268 	ravb_flush_dcache((uintptr_t)eth->tx_desc, desc_size);  in ravb_tx_desc_init()
271 	eth->base_desc[RAVB_TX_QUEUE_OFFSET].ctrl = RAVB_DESC_DT_LINKFIX;  in ravb_tx_desc_init()
272 	eth->base_desc[RAVB_TX_QUEUE_OFFSET].dptr = (uintptr_t)eth->tx_desc;  in ravb_tx_desc_init()
273 	ravb_flush_dcache((uintptr_t)&eth->base_desc[RAVB_TX_QUEUE_OFFSET],  in ravb_tx_desc_init()
277 static void ravb_rx_desc_init(struct ravb_priv *eth)  in ravb_rx_desc_init()  argument
283 	memset(eth->rx_desc, 0x0, desc_size);  in ravb_rx_desc_init()
284 	eth->rx_desc_idx = 0;  in ravb_rx_desc_init()
287 		eth->rx_desc[i].data.ctrl = RAVB_DESC_DT_EEMPTY |  in ravb_rx_desc_init()
289 		eth->rx_desc[i].data.dptr = (uintptr_t)eth->rx_desc[i].packet;  in ravb_rx_desc_init()
291 		eth->rx_desc[i].link.ctrl = RAVB_DESC_DT_LINKFIX;  in ravb_rx_desc_init()
292 		eth->rx_desc[i].link.dptr = (uintptr_t)&eth->rx_desc[i + 1];  in ravb_rx_desc_init()
296 	eth->rx_desc[RAVB_NUM_RX_DESC - 1].link.ctrl = RAVB_DESC_DT_LINKFIX;  in ravb_rx_desc_init()
297 	eth->rx_desc[RAVB_NUM_RX_DESC - 1].link.dptr = (uintptr_t)eth->rx_desc;  in ravb_rx_desc_init()
298 	ravb_flush_dcache((uintptr_t)eth->rx_desc, desc_size);  in ravb_rx_desc_init()
301 	eth->base_desc[RAVB_RX_QUEUE_OFFSET].ctrl = RAVB_DESC_DT_LINKFIX;  in ravb_rx_desc_init()
302 	eth->base_desc[RAVB_RX_QUEUE_OFFSET].dptr = (uintptr_t)eth->rx_desc;  in ravb_rx_desc_init()
303 	ravb_flush_dcache((uintptr_t)&eth->base_desc[RAVB_RX_QUEUE_OFFSET],  in ravb_rx_desc_init()
309 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_phy_config()  local
314 	if (dm_gpio_is_valid(&eth->reset_gpio)) {  in ravb_phy_config()
315 		dm_gpio_set_value(&eth->reset_gpio, 1);  in ravb_phy_config()
317 		dm_gpio_set_value(&eth->reset_gpio, 0);  in ravb_phy_config()
321 	phydev = phy_find_by_mask(eth->bus, mask, pdata->phy_interface);  in ravb_phy_config()
327 	eth->phydev = phydev;  in ravb_phy_config()
349 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_write_hwaddr()  local
354 	       eth->iobase + RAVB_REG_MAHR);  in ravb_write_hwaddr()
356 	writel((mac[4] << 8) | mac[5], eth->iobase + RAVB_REG_MALR);  in ravb_write_hwaddr()
362 static int ravb_mac_init(struct ravb_priv *eth)  in ravb_mac_init()  argument
365 	writel(0, eth->iobase + RAVB_REG_ECSIPR);  in ravb_mac_init()
368 	writel(RFLR_RFL_MIN, eth->iobase + RAVB_REG_RFLR);  in ravb_mac_init()
376 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_dmac_init()  local
386 	writel(0, eth->iobase + RAVB_REG_RIC0);  in ravb_dmac_init()
387 	writel(0, eth->iobase + RAVB_REG_RIC1);  in ravb_dmac_init()
388 	writel(0, eth->iobase + RAVB_REG_RIC2);  in ravb_dmac_init()
389 	writel(0, eth->iobase + RAVB_REG_TIC);  in ravb_dmac_init()
392 	clrbits_le32(eth->iobase + RAVB_REG_CCC, CCC_BOC);  in ravb_dmac_init()
395 	writel(0x18000001, eth->iobase + RAVB_REG_RCR);  in ravb_dmac_init()
398 	writel(0x00222210, eth->iobase + RAVB_REG_TGC);  in ravb_dmac_init()
407 		writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);  in ravb_dmac_init()
414 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_config()  local
415 	struct phy_device *phy = eth->phydev;  in ravb_config()
423 	ravb_mac_init(eth);  in ravb_config()
432 		writel(0, eth->iobase + RAVB_REG_GECMR);  in ravb_config()
434 		writel(1, eth->iobase + RAVB_REG_GECMR);  in ravb_config()
440 	writel(mask, eth->iobase + RAVB_REG_ECMR);  in ravb_config()
447 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_start()  local
454 	ravb_base_desc_init(eth);  in ravb_start()
455 	ravb_tx_desc_init(eth);  in ravb_start()
456 	ravb_rx_desc_init(eth);  in ravb_start()
463 	writel(CCC_OPC_OPERATION, eth->iobase + RAVB_REG_CCC);  in ravb_start()
470 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_stop()  local
472 	phy_shutdown(eth->phydev);  in ravb_stop()
479 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_probe()  local
486 	eth->iobase = iobase;  in ravb_probe()
488 	ret = clk_get_by_index(dev, 0, &eth->clk);  in ravb_probe()
495 					   &eth->reset_gpio, GPIOD_IS_OUT);  in ravb_probe()
498 	if (!dm_gpio_is_valid(&eth->reset_gpio)) {  in ravb_probe()
499 		gpio_request_by_name(dev, "reset-gpios", 0, &eth->reset_gpio,  in ravb_probe()
511 	bb_miiphy_buses[0].priv = eth;  in ravb_probe()
518 	eth->bus = miiphy_get_dev_by_name(dev->name);  in ravb_probe()
521 	ret = clk_enable(&eth->clk);  in ravb_probe()
536 	clk_disable(&eth->clk);  in ravb_probe()
540 	unmap_physmem(eth->iobase, MAP_NOCACHE);  in ravb_probe()
546 	struct ravb_priv *eth = dev_get_priv(dev);  in ravb_remove()  local
548 	clk_disable(&eth->clk);  in ravb_remove()
550 	free(eth->phydev);  in ravb_remove()
551 	mdio_unregister(eth->bus);  in ravb_remove()
552 	mdio_free(eth->bus);  in ravb_remove()
553 	if (dm_gpio_is_valid(&eth->reset_gpio))  in ravb_remove()
554 		dm_gpio_free(dev, &eth->reset_gpio);  in ravb_remove()
555 	unmap_physmem(eth->iobase, MAP_NOCACHE);  in ravb_remove()
567 	struct ravb_priv *eth = bus->priv;  in ravb_bb_mdio_active()  local
569 	setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MMD);  in ravb_bb_mdio_active()
576 	struct ravb_priv *eth = bus->priv;  in ravb_bb_mdio_tristate()  local
578 	clrbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MMD);  in ravb_bb_mdio_tristate()
585 	struct ravb_priv *eth = bus->priv;  in ravb_bb_set_mdio()  local
588 		setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDO);  in ravb_bb_set_mdio()
590 		clrbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDO);  in ravb_bb_set_mdio()
597 	struct ravb_priv *eth = bus->priv;  in ravb_bb_get_mdio()  local
599 	*v = (readl(eth->iobase + RAVB_REG_PIR) & PIR_MDI) >> 3;  in ravb_bb_get_mdio()
606 	struct ravb_priv *eth = bus->priv;  in ravb_bb_set_mdc()  local
609 		setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDC);  in ravb_bb_set_mdc()
611 		clrbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDC);  in ravb_bb_set_mdc()