1menu "ARM architecture" 2 depends on ARM 3 4config SYS_ARCH 5 default "arm" 6 7config ARM64 8 bool 9 select PHYS_64BIT 10 select SYS_CACHE_SHIFT_6 11 12config ARM64_CRC32 13 bool "Enable support for CRC32 instruction" 14 depends on ARM64 15 default y 16 help 17 ARMv8 implements dedicated crc32 instruction for crc32 calculation. 18 This is faster than software crc32 calculation. This instruction may 19 not be present on all ARMv8.0, but is always present on ARMv8.1 and 20 newer. 21 22config POSITION_INDEPENDENT 23 bool "Generate position-independent pre-relocation code" 24 depends on ARM64 || CPU_V7A 25 help 26 U-Boot expects to be linked to a specific hard-coded address, and to 27 be loaded to and run from that address. This option lifts that 28 restriction, thus allowing the code to be loaded to and executed from 29 almost any 4K aligned address. This logic relies on the relocation 30 information that is embedded in the binary to support U-Boot 31 relocating itself to the top-of-RAM later during execution. 32 33config INIT_SP_RELATIVE 34 bool "Specify the early stack pointer relative to the .bss section" 35 depends on ARM64 36 default n if ARCH_QEMU 37 default y if POSITION_INDEPENDENT 38 help 39 U-Boot typically uses a hard-coded value for the stack pointer 40 before relocation. Enable this option to instead calculate the 41 initial SP at run-time. This is useful to avoid hard-coding addresses 42 into U-Boot, so that it can be loaded and executed at arbitrary 43 addresses and thus avoid using arbitrary addresses at runtime. 44 45 If this option is enabled, the early stack pointer is set to 46 &_bss_start with a offset value added. The offset is specified by 47 SYS_INIT_SP_BSS_OFFSET. 48 49config SYS_INIT_SP_BSS_OFFSET 50 int "Early stack offset from the .bss base address" 51 depends on ARM64 52 depends on INIT_SP_RELATIVE 53 default 524288 54 help 55 This option's value is the offset added to &_bss_start in order to 56 calculate the stack pointer. This offset should be large enough so 57 that the early malloc region, global data (gd), and early stack usage 58 do not overlap any appended DTB. 59 60config LINUX_KERNEL_IMAGE_HEADER 61 depends on ARM64 62 bool 63 help 64 Place a Linux kernel image header at the start of the U-Boot binary. 65 The format of the header is described in the Linux kernel source at 66 Documentation/arm64/booting.txt. This feature is useful since the 67 image header reports the amount of memory (BSS and similar) that 68 U-Boot needs to use, but which isn't part of the binary. 69 70config LNX_KRNL_IMG_TEXT_OFFSET_BASE 71 depends on LINUX_KERNEL_IMAGE_HEADER 72 hex 73 help 74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the 75 TEXT_OFFSET value written to the Linux kernel image header. 76 77config GICV2 78 bool 79 80config GICV3 81 bool 82 83config GIC_V3_ITS 84 bool "ARM GICV3 ITS" 85 select IRQ 86 help 87 ARM GICV3 Interrupt translation service (ITS). 88 Basic support for programming locality specific peripheral 89 interrupts (LPI) configuration tables and enable LPI tables. 90 LPI configuration table can be used by u-boot or Linux. 91 ARM GICV3 has limitation, once the LPI table is enabled, LPI 92 configuration table can not be re-programmed, unless GICV3 reset. 93 94config STATIC_RELA 95 bool 96 default y if ARM64 97 98config DMA_ADDR_T_64BIT 99 bool 100 default y if ARM64 101 102config HAS_VBAR 103 bool 104 105config HAS_THUMB2 106 bool 107 108config GPIO_EXTRA_HEADER 109 bool 110 111# Used for compatibility with asm files copied from the kernel 112config ARM_ASM_UNIFIED 113 bool 114 default y 115 116# Used for compatibility with asm files copied from the kernel 117config THUMB2_KERNEL 118 bool 119 120config SYS_ICACHE_OFF 121 bool "Do not enable icache" 122 help 123 Do not enable instruction cache in U-Boot. 124 125config SPL_SYS_ICACHE_OFF 126 bool "Do not enable icache in SPL" 127 depends on SPL 128 default SYS_ICACHE_OFF 129 help 130 Do not enable instruction cache in SPL. 131 132config SYS_DCACHE_OFF 133 bool "Do not enable dcache" 134 help 135 Do not enable data cache in U-Boot. 136 137config SPL_SYS_DCACHE_OFF 138 bool "Do not enable dcache in SPL" 139 depends on SPL 140 default SYS_DCACHE_OFF 141 help 142 Do not enable data cache in SPL. 143 144config SYS_ARM_CACHE_CP15 145 bool "CP15 based cache enabling support" 146 help 147 Select this if your processor suports enabling caches by using 148 CP15 registers. 149 150config SYS_ARM_MMU 151 bool "MMU-based Paged Memory Management Support" 152 select SYS_ARM_CACHE_CP15 153 help 154 Select if you want MMU-based virtualised addressing space 155 support via paged memory management. 156 157config SYS_ARM_MPU 158 bool 'Use the ARM v7 PMSA Compliant MPU' 159 help 160 Some ARM systems without an MMU have instead a Memory Protection 161 Unit (MPU) that defines the type and permissions for regions of 162 memory. 163 If your CPU has an MPU then you should choose 'y' here unless you 164 know that you do not want to use the MPU. 165 166# If set, the workarounds for these ARM errata are applied early during U-Boot 167# startup. Note that in general these options force the workarounds to be 168# applied; no CPU-type/version detection exists, unlike the similar options in 169# the Linux kernel. Do not set these options unless they apply! Also note that 170# the following can be machine-specific errata. These do have ability to 171# provide rudimentary version and machine-specific checks, but expect no 172# product checks: 173# CONFIG_ARM_ERRATA_430973 174# CONFIG_ARM_ERRATA_454179 175# CONFIG_ARM_ERRATA_621766 176# CONFIG_ARM_ERRATA_798870 177# CONFIG_ARM_ERRATA_801819 178# CONFIG_ARM_CORTEX_A8_CVE_2017_5715 179# CONFIG_ARM_CORTEX_A15_CVE_2017_5715 180 181config ARM_ERRATA_430973 182 bool 183 184config ARM_ERRATA_454179 185 bool 186 187config ARM_ERRATA_621766 188 bool 189 190config ARM_ERRATA_716044 191 bool 192 193config ARM_ERRATA_725233 194 bool 195 196config ARM_ERRATA_742230 197 bool 198 199config ARM_ERRATA_743622 200 bool 201 202config ARM_ERRATA_751472 203 bool 204 205config ARM_ERRATA_761320 206 bool 207 208config ARM_ERRATA_773022 209 bool 210 211config ARM_ERRATA_774769 212 bool 213 214config ARM_ERRATA_794072 215 bool 216 217config ARM_ERRATA_798870 218 bool 219 220config ARM_ERRATA_801819 221 bool 222 223config ARM_ERRATA_826974 224 bool 225 226config ARM_ERRATA_828024 227 bool 228 229config ARM_ERRATA_829520 230 bool 231 232config ARM_ERRATA_833069 233 bool 234 235config ARM_ERRATA_833471 236 bool 237 238config ARM_ERRATA_845369 239 bool 240 241config ARM_ERRATA_852421 242 bool 243 244config ARM_ERRATA_852423 245 bool 246 247config ARM_ERRATA_855873 248 bool 249 250config ARM_CORTEX_A8_CVE_2017_5715 251 bool 252 253config ARM_CORTEX_A15_CVE_2017_5715 254 bool 255 256config CPU_ARM720T 257 bool 258 select SYS_CACHE_SHIFT_5 259 imply SYS_ARM_MMU 260 261config CPU_ARM920T 262 bool 263 select SYS_CACHE_SHIFT_5 264 imply SYS_ARM_MMU 265 266config CPU_ARM926EJS 267 bool 268 select SYS_CACHE_SHIFT_5 269 imply SYS_ARM_MMU 270 271config CPU_ARM946ES 272 bool 273 select SYS_CACHE_SHIFT_5 274 imply SYS_ARM_MMU 275 276config CPU_ARM1136 277 bool 278 select SYS_CACHE_SHIFT_5 279 imply SYS_ARM_MMU 280 281config CPU_ARM1176 282 bool 283 select HAS_VBAR 284 select SYS_CACHE_SHIFT_5 285 imply SYS_ARM_MMU 286 287config CPU_V7A 288 bool 289 select HAS_THUMB2 290 select HAS_VBAR 291 select SYS_CACHE_SHIFT_6 292 imply SYS_ARM_MMU 293 294config CPU_V7M 295 bool 296 select HAS_THUMB2 297 select SYS_ARM_MPU 298 select SYS_CACHE_SHIFT_5 299 select SYS_THUMB_BUILD 300 select THUMB2_KERNEL 301 302config CPU_V7R 303 bool 304 select HAS_THUMB2 305 select SYS_ARM_CACHE_CP15 306 select SYS_ARM_MPU 307 select SYS_CACHE_SHIFT_6 308 309config CPU_PXA 310 bool 311 select SYS_CACHE_SHIFT_5 312 imply SYS_ARM_MMU 313 314config CPU_SA1100 315 bool 316 select SYS_CACHE_SHIFT_5 317 imply SYS_ARM_MMU 318 319config SYS_CPU 320 default "arm720t" if CPU_ARM720T 321 default "arm920t" if CPU_ARM920T 322 default "arm926ejs" if CPU_ARM926EJS 323 default "arm946es" if CPU_ARM946ES 324 default "arm1136" if CPU_ARM1136 325 default "arm1176" if CPU_ARM1176 326 default "armv7" if CPU_V7A 327 default "armv7" if CPU_V7R 328 default "armv7m" if CPU_V7M 329 default "pxa" if CPU_PXA 330 default "sa1100" if CPU_SA1100 331 default "armv8" if ARM64 332 333config SYS_ARM_ARCH 334 int 335 default 4 if CPU_ARM720T 336 default 4 if CPU_ARM920T 337 default 5 if CPU_ARM926EJS 338 default 5 if CPU_ARM946ES 339 default 6 if CPU_ARM1136 340 default 6 if CPU_ARM1176 341 default 7 if CPU_V7A 342 default 7 if CPU_V7M 343 default 7 if CPU_V7R 344 default 5 if CPU_PXA 345 default 4 if CPU_SA1100 346 default 8 if ARM64 347 348choice 349 prompt "Select the ARM data write cache policy" 350 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ 351 CPU_PXA || RZA1 352 default SYS_ARM_CACHE_WRITEBACK 353 354config SYS_ARM_CACHE_WRITEBACK 355 bool "Write-back (WB)" 356 help 357 A write updates the cache only and marks the cache line as dirty. 358 External memory is updated only when the line is evicted or explicitly 359 cleaned. 360 361config SYS_ARM_CACHE_WRITETHROUGH 362 bool "Write-through (WT)" 363 help 364 A write updates both the cache and the external memory system. 365 This does not mark the cache line as dirty. 366 367config SYS_ARM_CACHE_WRITEALLOC 368 bool "Write allocation (WA)" 369 help 370 A cache line is allocated on a write miss. This means that executing a 371 store instruction on the processor might cause a burst read to occur. 372 There is a linefill to obtain the data for the cache line, before the 373 write is performed. 374endchoice 375 376config ARCH_CPU_INIT 377 bool "Enable ARCH_CPU_INIT" 378 help 379 Some architectures require a call to arch_cpu_init(). 380 Say Y here to enable it 381 382config SYS_ARCH_TIMER 383 bool "ARM Generic Timer support" 384 depends on CPU_V7A || ARM64 385 default y if ARM64 386 help 387 The ARM Generic Timer (aka arch-timer) provides an architected 388 interface to a timer source on an SoC. 389 It is mandatory for ARMv8 implementation and widely available 390 on ARMv7 systems. 391 392config ARM_SMCCC 393 bool "Support for ARM SMC Calling Convention (SMCCC)" 394 depends on CPU_V7A || ARM64 395 select ARM_PSCI_FW 396 help 397 Say Y here if you want to enable ARM SMC Calling Convention. 398 This should be enabled if U-Boot needs to communicate with system 399 firmware (for example, PSCI) according to SMCCC. 400 401config SEMIHOSTING 402 bool "support boot from semihosting" 403 help 404 In emulated environments, semihosting is a way for 405 the hosted environment to call out to the emulator to 406 retrieve files from the host machine. 407 408config SYS_THUMB_BUILD 409 bool "Build U-Boot using the Thumb instruction set" 410 depends on !ARM64 411 help 412 Use this flag to build U-Boot using the Thumb instruction set for 413 ARM architectures. Thumb instruction set provides better code 414 density. For ARM architectures that support Thumb2 this flag will 415 result in Thumb2 code generated by GCC. 416 417config SPL_SYS_THUMB_BUILD 418 bool "Build SPL using the Thumb instruction set" 419 default y if SYS_THUMB_BUILD 420 depends on !ARM64 && SPL 421 help 422 Use this flag to build SPL using the Thumb instruction set for 423 ARM architectures. Thumb instruction set provides better code 424 density. For ARM architectures that support Thumb2 this flag will 425 result in Thumb2 code generated by GCC. 426 427config TPL_SYS_THUMB_BUILD 428 bool "Build TPL using the Thumb instruction set" 429 default y if SYS_THUMB_BUILD 430 depends on TPL && !ARM64 431 help 432 Use this flag to build TPL using the Thumb instruction set for 433 ARM architectures. Thumb instruction set provides better code 434 density. For ARM architectures that support Thumb2 this flag will 435 result in Thumb2 code generated by GCC. 436 437 438config SYS_L2CACHE_OFF 439 bool "L2cache off" 440 help 441 If SoC does not support L2CACHE or one does not want to enable 442 L2CACHE, choose this option. 443 444config ENABLE_ARM_SOC_BOOT0_HOOK 445 bool "prepare BOOT0 header" 446 help 447 If the SoC's BOOT0 requires a header area filled with (magic) 448 values, then choose this option, and create a file included as 449 <asm/arch/boot0.h> which contains the required assembler code. 450 451config ARM_CORTEX_CPU_IS_UP 452 bool 453 454config USE_ARCH_MEMCPY 455 bool "Use an assembly optimized implementation of memcpy" 456 default y if !ARM64 457 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) 458 help 459 Enable the generation of an optimized version of memcpy. 460 Such an implementation may be faster under some conditions 461 but may increase the binary size. 462 463config SPL_USE_ARCH_MEMCPY 464 bool "Use an assembly optimized implementation of memcpy for SPL" 465 default y if USE_ARCH_MEMCPY 466 depends on SPL 467 help 468 Enable the generation of an optimized version of memcpy. 469 Such an implementation may be faster under some conditions 470 but may increase the binary size. 471 472config TPL_USE_ARCH_MEMCPY 473 bool "Use an assembly optimized implementation of memcpy for TPL" 474 default y if USE_ARCH_MEMCPY 475 depends on TPL 476 help 477 Enable the generation of an optimized version of memcpy. 478 Such an implementation may be faster under some conditions 479 but may increase the binary size. 480 481config USE_ARCH_MEMMOVE 482 bool "Use an assembly optimized implementation of memmove" if !ARM64 483 default USE_ARCH_MEMCPY if ARM64 484 depends on ARM64 485 help 486 Enable the generation of an optimized version of memmove. 487 Such an implementation may be faster under some conditions 488 but may increase the binary size. 489 490config SPL_USE_ARCH_MEMMOVE 491 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64 492 default SPL_USE_ARCH_MEMCPY if ARM64 493 depends on SPL && ARM64 494 help 495 Enable the generation of an optimized version of memmove. 496 Such an implementation may be faster under some conditions 497 but may increase the binary size. 498 499config TPL_USE_ARCH_MEMMOVE 500 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64 501 default TPL_USE_ARCH_MEMCPY if ARM64 502 depends on TPL && ARM64 503 help 504 Enable the generation of an optimized version of memmove. 505 Such an implementation may be faster under some conditions 506 but may increase the binary size. 507 508config USE_ARCH_MEMSET 509 bool "Use an assembly optimized implementation of memset" 510 default y if !ARM64 511 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) 512 help 513 Enable the generation of an optimized version of memset. 514 Such an implementation may be faster under some conditions 515 but may increase the binary size. 516 517config SPL_USE_ARCH_MEMSET 518 bool "Use an assembly optimized implementation of memset for SPL" 519 default y if USE_ARCH_MEMSET 520 depends on SPL 521 help 522 Enable the generation of an optimized version of memset. 523 Such an implementation may be faster under some conditions 524 but may increase the binary size. 525 526config TPL_USE_ARCH_MEMSET 527 bool "Use an assembly optimized implementation of memset for TPL" 528 default y if USE_ARCH_MEMSET 529 depends on TPL 530 help 531 Enable the generation of an optimized version of memset. 532 Such an implementation may be faster under some conditions 533 but may increase the binary size. 534 535config ARM64_SUPPORT_AARCH32 536 bool "ARM64 system support AArch32 execution state" 537 depends on ARM64 538 default y if !TARGET_THUNDERX_88XX 539 help 540 This ARM64 system supports AArch32 execution state. 541 542choice 543 prompt "Target select" 544 default TARGET_HIKEY 545 546config ARCH_AT91 547 bool "Atmel AT91" 548 select GPIO_EXTRA_HEADER 549 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB 550 select SPL_SEPARATE_BSS if SPL 551 552config ARCH_DAVINCI 553 bool "TI DaVinci" 554 select CPU_ARM926EJS 555 select GPIO_EXTRA_HEADER 556 select SPL_DM_SPI if SPL 557 imply CMD_SAVES 558 help 559 Support for TI's DaVinci platform. 560 561config ARCH_KIRKWOOD 562 bool "Marvell Kirkwood" 563 select ARCH_MISC_INIT 564 select BOARD_EARLY_INIT_F 565 select CPU_ARM926EJS 566 select GPIO_EXTRA_HEADER 567 568config ARCH_MVEBU 569 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" 570 select DM 571 select DM_ETH 572 select DM_SERIAL 573 select DM_SPI 574 select DM_SPI_FLASH 575 select GPIO_EXTRA_HEADER 576 select SPL_DM_SPI if SPL 577 select SPL_DM_SPI_FLASH if SPL 578 select OF_CONTROL 579 select OF_SEPARATE 580 select SPI 581 imply CMD_DM 582 583config ARCH_ORION5X 584 bool "Marvell Orion" 585 select CPU_ARM926EJS 586 select GPIO_EXTRA_HEADER 587 588config TARGET_STV0991 589 bool "Support stv0991" 590 select CPU_V7A 591 select DM 592 select DM_SERIAL 593 select DM_SPI 594 select DM_SPI_FLASH 595 select GPIO_EXTRA_HEADER 596 select PL01X_SERIAL 597 select SPI 598 select SPI_FLASH 599 imply CMD_DM 600 601config ARCH_BCM283X 602 bool "Broadcom BCM283X family" 603 select DM 604 select DM_GPIO 605 select DM_SERIAL 606 select GPIO_EXTRA_HEADER 607 select OF_CONTROL 608 select PL01X_SERIAL 609 select SERIAL_SEARCH_ALL 610 imply CMD_DM 611 imply FAT_WRITE 612 613config ARCH_BCM63158 614 bool "Broadcom BCM63158 family" 615 select DM 616 select OF_CONTROL 617 imply CMD_DM 618 619config ARCH_BCM68360 620 bool "Broadcom BCM68360 family" 621 select DM 622 select OF_CONTROL 623 imply CMD_DM 624 625config ARCH_BCM6858 626 bool "Broadcom BCM6858 family" 627 select DM 628 select OF_CONTROL 629 imply CMD_DM 630 631config ARCH_BCMSTB 632 bool "Broadcom BCM7XXX family" 633 select CPU_V7A 634 select DM 635 select GPIO_EXTRA_HEADER 636 select OF_CONTROL 637 imply CMD_DM 638 help 639 This enables support for Broadcom ARM-based set-top box 640 chipsets, including the 7445 family of chips. 641 642config TARGET_VEXPRESS_CA9X4 643 bool "Support vexpress_ca9x4" 644 select CPU_V7A 645 select PL011_SERIAL 646 647config TARGET_BCMCYGNUS 648 bool "Support bcmcygnus" 649 select CPU_V7A 650 select GPIO_EXTRA_HEADER 651 imply BCM_SF2_ETH 652 imply BCM_SF2_ETH_GMAC 653 imply CMD_HASH 654 imply CRC32_VERIFY 655 imply FAT_WRITE 656 imply HASH_VERIFY 657 imply NETDEVICES 658 659config TARGET_BCMNS2 660 bool "Support Broadcom Northstar2" 661 select ARM64 662 select GPIO_EXTRA_HEADER 663 help 664 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit 665 ARMv8 Cortex-A57 processors targeting a broad range of networking 666 applications. 667 668config TARGET_BCMNS3 669 bool "Support Broadcom NS3" 670 select ARM64 671 select BOARD_LATE_INIT 672 help 673 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit 674 ARMv8 Cortex-A72 processors targeting a broad range of networking 675 applications. 676 677config ARCH_EXYNOS 678 bool "Samsung EXYNOS" 679 select DM 680 select DM_GPIO 681 select DM_I2C 682 select DM_ETH 683 select DM_KEYBOARD 684 select DM_SERIAL 685 select DM_SPI 686 select DM_SPI_FLASH 687 select SPI 688 select GPIO_EXTRA_HEADER 689 imply SYS_THUMB_BUILD 690 imply CMD_DM 691 imply FAT_WRITE 692 693config ARCH_S5PC1XX 694 bool "Samsung S5PC1XX" 695 select CPU_V7A 696 select DM 697 select DM_GPIO 698 select DM_I2C 699 select DM_SERIAL 700 select GPIO_EXTRA_HEADER 701 imply CMD_DM 702 703config ARCH_HIGHBANK 704 bool "Calxeda Highbank" 705 select CPU_V7A 706 select PL01X_SERIAL 707 select DM 708 select DM_SERIAL 709 select OF_CONTROL 710 select OF_BOARD 711 select CLK 712 select CLK_CCF 713 select AHCI 714 select DM_ETH 715 select PHYS_64BIT 716 717config ARCH_INTEGRATOR 718 bool "ARM Ltd. Integrator family" 719 select DM 720 select DM_SERIAL 721 select GPIO_EXTRA_HEADER 722 select PL01X_SERIAL 723 imply CMD_DM 724 725config ARCH_IPQ40XX 726 bool "Qualcomm IPQ40xx SoCs" 727 select CPU_V7A 728 select DM 729 select DM_GPIO 730 select DM_SERIAL 731 select DM_RESET 732 select GPIO_EXTRA_HEADER 733 select MSM_SMEM 734 select PINCTRL 735 select CLK 736 select SMEM 737 select OF_CONTROL 738 imply CMD_DM 739 740config ARCH_KEYSTONE 741 bool "TI Keystone" 742 select CMD_POWEROFF 743 select CPU_V7A 744 select DDR_SPD 745 select GPIO_EXTRA_HEADER 746 select SUPPORT_SPL 747 select SYS_ARCH_TIMER 748 select SYS_THUMB_BUILD 749 imply CMD_MTDPARTS 750 imply CMD_SAVES 751 imply FIT 752 753config ARCH_K3 754 bool "Texas Instruments' K3 Architecture" 755 select SPL 756 select SUPPORT_SPL 757 select FIT 758 759config ARCH_OMAP2PLUS 760 bool "TI OMAP2+" 761 select CPU_V7A 762 select GPIO_EXTRA_HEADER 763 select SPL_BOARD_INIT if SPL 764 select SPL_STACK_R if SPL 765 select SUPPORT_SPL 766 imply TI_SYSC if DM && OF_CONTROL 767 imply FIT 768 769config ARCH_MESON 770 bool "Amlogic Meson" 771 select GPIO_EXTRA_HEADER 772 imply DISTRO_DEFAULTS 773 imply DM_RNG 774 help 775 Support for the Meson SoC family developed by Amlogic Inc., 776 targeted at media players and tablet computers. We currently 777 support the S905 (GXBaby) 64-bit SoC. 778 779config ARCH_MEDIATEK 780 bool "MediaTek SoCs" 781 select DM 782 select GPIO_EXTRA_HEADER 783 select OF_CONTROL 784 select SPL_DM if SPL 785 select SPL_LIBCOMMON_SUPPORT if SPL 786 select SPL_LIBGENERIC_SUPPORT if SPL 787 select SPL_OF_CONTROL if SPL 788 select SUPPORT_SPL 789 help 790 Support for the MediaTek SoCs family developed by MediaTek Inc. 791 Please refer to doc/README.mediatek for more information. 792 793config ARCH_LPC32XX 794 bool "NXP LPC32xx platform" 795 select CPU_ARM926EJS 796 select DM 797 select DM_GPIO 798 select DM_SERIAL 799 select GPIO_EXTRA_HEADER 800 select SPL_DM if SPL 801 select SUPPORT_SPL 802 imply CMD_DM 803 804config ARCH_IMX8 805 bool "NXP i.MX8 platform" 806 select ARM64 807 select DM 808 select GPIO_EXTRA_HEADER 809 select MACH_IMX 810 select OF_CONTROL 811 select ENABLE_ARM_SOC_BOOT0_HOOK 812 813config ARCH_IMX8M 814 bool "NXP i.MX8M platform" 815 select ARM64 816 select GPIO_EXTRA_HEADER 817 select MACH_IMX 818 select SYS_FSL_HAS_SEC if IMX_HAB 819 select SYS_FSL_SEC_COMPAT_4 820 select SYS_FSL_SEC_LE 821 select SYS_I2C_MXC 822 select DM 823 select SUPPORT_SPL 824 imply CMD_DM 825 826config ARCH_IMX8ULP 827 bool "NXP i.MX8ULP platform" 828 select ARM64 829 select DM 830 select MACH_IMX 831 select OF_CONTROL 832 select SUPPORT_SPL 833 select GPIO_EXTRA_HEADER 834 imply CMD_DM 835 836config ARCH_IMXRT 837 bool "NXP i.MXRT platform" 838 select CPU_V7M 839 select DM 840 select DM_SERIAL 841 select GPIO_EXTRA_HEADER 842 select MACH_IMX 843 select SUPPORT_SPL 844 imply CMD_DM 845 846config ARCH_MX23 847 bool "NXP i.MX23 family" 848 select CPU_ARM926EJS 849 select GPIO_EXTRA_HEADER 850 select MACH_IMX 851 select PL011_SERIAL 852 select SUPPORT_SPL 853 854config ARCH_MX28 855 bool "NXP i.MX28 family" 856 select CPU_ARM926EJS 857 select GPIO_EXTRA_HEADER 858 select PL011_SERIAL 859 select MACH_IMX 860 select SUPPORT_SPL 861 862config ARCH_MX31 863 bool "NXP i.MX31 family" 864 select CPU_ARM1136 865 select GPIO_EXTRA_HEADER 866 select MACH_IMX 867 868config ARCH_MX7ULP 869 bool "NXP MX7ULP" 870 select CPU_V7A 871 select GPIO_EXTRA_HEADER 872 select MACH_IMX 873 select SYS_FSL_HAS_SEC if IMX_HAB 874 select SYS_FSL_SEC_COMPAT_4 875 select SYS_FSL_SEC_LE 876 select ROM_UNIFIED_SECTIONS 877 imply MXC_GPIO 878 imply SYS_THUMB_BUILD 879 880config ARCH_MX7 881 bool "Freescale MX7" 882 select ARCH_MISC_INIT 883 select CPU_V7A 884 select GPIO_EXTRA_HEADER 885 select MACH_IMX 886 select SYS_FSL_HAS_SEC if IMX_HAB 887 select SYS_FSL_SEC_COMPAT_4 888 select SYS_FSL_SEC_LE 889 imply BOARD_EARLY_INIT_F 890 imply MXC_GPIO 891 imply SYS_THUMB_BUILD 892 893config ARCH_MX6 894 bool "Freescale MX6" 895 select CPU_V7A 896 select GPIO_EXTRA_HEADER 897 select MACH_IMX 898 select SYS_FSL_HAS_SEC 899 select SYS_FSL_SEC_COMPAT_4 900 select SYS_FSL_SEC_LE 901 imply MXC_GPIO 902 imply SYS_THUMB_BUILD 903 904if ARCH_MX6 905config SPL_LDSCRIPT 906 default "arch/arm/mach-omap2/u-boot-spl.lds" 907endif 908 909config ARCH_MX5 910 bool "Freescale MX5" 911 select BOARD_EARLY_INIT_F 912 select CPU_V7A 913 select GPIO_EXTRA_HEADER 914 select MACH_IMX 915 imply MXC_GPIO 916 917config ARCH_NEXELL 918 bool "Nexell S5P4418/S5P6818 SoC" 919 select ENABLE_ARM_SOC_BOOT0_HOOK 920 select DM 921 select GPIO_EXTRA_HEADER 922 923config ARCH_APPLE 924 bool "Apple SoCs" 925 select ARM64 926 select BLK 927 select CLK 928 select CMD_USB 929 select DM 930 select DM_KEYBOARD 931 select DM_SERIAL 932 select DM_USB 933 select DM_VIDEO 934 select IOMMU 935 select LINUX_KERNEL_IMAGE_HEADER 936 select OF_CONTROL 937 select OF_BOARD 938 select POSITION_INDEPENDENT 939 select USB 940 imply CMD_DM 941 imply CMD_GPT 942 imply DISTRO_DEFAULTS 943 944config ARCH_OWL 945 bool "Actions Semi OWL SoCs" 946 select DM 947 select DM_ETH 948 select DM_SERIAL 949 select GPIO_EXTRA_HEADER 950 select OWL_SERIAL 951 select CLK 952 select CLK_OWL 953 select OF_CONTROL 954 select SYS_RELOC_GD_ENV_ADDR 955 imply CMD_DM 956 957config ARCH_QEMU 958 bool "QEMU Virtual Platform" 959 select DM 960 select DM_SERIAL 961 select OF_CONTROL 962 select PL01X_SERIAL 963 imply CMD_DM 964 imply DM_RNG 965 imply DM_RTC 966 imply RTC_PL031 967 968config ARCH_RMOBILE 969 bool "Renesas ARM SoCs" 970 select DM 971 select DM_SERIAL 972 select GPIO_EXTRA_HEADER 973 imply BOARD_EARLY_INIT_F 974 imply CMD_DM 975 imply FAT_WRITE 976 imply SYS_THUMB_BUILD 977 imply ARCH_MISC_INIT if DISPLAY_CPUINFO 978 979config ARCH_SNAPDRAGON 980 bool "Qualcomm Snapdragon SoCs" 981 select ARM64 982 select DM 983 select DM_GPIO 984 select DM_SERIAL 985 select GPIO_EXTRA_HEADER 986 select MSM_SMEM 987 select OF_CONTROL 988 select OF_SEPARATE 989 select SMEM 990 select SPMI 991 imply CMD_DM 992 993config ARCH_SOCFPGA 994 bool "Altera SOCFPGA family" 995 select ARCH_EARLY_INIT_R 996 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 997 select ARM64 if TARGET_SOCFPGA_SOC64 998 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 999 select DM 1000 select DM_SERIAL 1001 select GICV2 1002 select GPIO_EXTRA_HEADER 1003 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1004 select OF_CONTROL 1005 select SPL_DM_RESET if DM_RESET 1006 select SPL_DM_SERIAL 1007 select SPL_LIBCOMMON_SUPPORT 1008 select SPL_LIBGENERIC_SUPPORT 1009 select SPL_NAND_SUPPORT if SPL_NAND_DENALI 1010 select SPL_OF_CONTROL 1011 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 1012 select SPL_SERIAL 1013 select SPL_SYSRESET 1014 select SPL_WATCHDOG 1015 select SUPPORT_SPL 1016 select SYS_NS16550 1017 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1018 select SYSRESET 1019 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1020 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64 1021 imply CMD_DM 1022 imply CMD_MTDPARTS 1023 imply CRC32_VERIFY 1024 imply DM_SPI 1025 imply DM_SPI_FLASH 1026 imply FAT_WRITE 1027 imply SPL 1028 imply SPL_DM 1029 imply SPL_DM_SPI 1030 imply SPL_DM_SPI_FLASH 1031 imply SPL_LIBDISK_SUPPORT 1032 imply SPL_MMC 1033 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 1034 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 1035 imply SPL_SPI_FLASH_SUPPORT 1036 imply SPL_SPI 1037 imply L2X0_CACHE 1038 1039config ARCH_SUNXI 1040 bool "Support sunxi (Allwinner) SoCs" 1041 select BINMAN 1042 select CMD_GPIO 1043 select CMD_MMC if MMC 1044 select CMD_USB if DISTRO_DEFAULTS && USB_HOST 1045 select CLK 1046 select DM 1047 select DM_ETH 1048 select DM_GPIO 1049 select DM_I2C if I2C 1050 select DM_KEYBOARD 1051 select DM_MMC if MMC 1052 select DM_SCSI if SCSI 1053 select DM_SERIAL 1054 select GPIO_EXTRA_HEADER 1055 select OF_BOARD_SETUP 1056 select OF_CONTROL 1057 select OF_SEPARATE 1058 select SPECIFY_CONSOLE_INDEX 1059 select SPL_SEPARATE_BSS if SPL 1060 select SPL_STACK_R if SPL 1061 select SPL_SYS_MALLOC_SIMPLE if SPL 1062 select SPL_SYS_THUMB_BUILD if !ARM64 1063 select SUNXI_GPIO 1064 select SYS_NS16550 1065 select SYS_THUMB_BUILD if !ARM64 1066 select USB if DISTRO_DEFAULTS 1067 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST 1068 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST 1069 select SPL_USE_TINY_PRINTF 1070 select USE_PREBOOT 1071 select SYS_RELOC_GD_ENV_ADDR 1072 imply BOARD_LATE_INIT 1073 imply CMD_DM 1074 imply CMD_GPT 1075 imply CMD_UBI if MTD_RAW_NAND 1076 imply DISTRO_DEFAULTS 1077 imply FAT_WRITE 1078 imply FIT 1079 imply OF_LIBFDT_OVERLAY 1080 imply PRE_CONSOLE_BUFFER 1081 imply SPL_GPIO 1082 imply SPL_LIBCOMMON_SUPPORT 1083 imply SPL_LIBGENERIC_SUPPORT 1084 imply SPL_MMC if MMC 1085 imply SPL_POWER 1086 imply SPL_SERIAL 1087 imply USB_GADGET 1088 imply WDT 1089 1090config ARCH_U8500 1091 bool "ST-Ericsson U8500 Series" 1092 select CPU_V7A 1093 select DM 1094 select DM_GPIO 1095 select DM_MMC if MMC 1096 select DM_SERIAL 1097 select DM_USB_GADGET if DM_USB 1098 select OF_CONTROL 1099 select SYSRESET 1100 select TIMER 1101 imply AB8500_USB_PHY 1102 imply ARM_PL180_MMCI 1103 imply CLK 1104 imply DM_PMIC 1105 imply DM_RTC 1106 imply NOMADIK_GPIO 1107 imply NOMADIK_MTU_TIMER 1108 imply PHY 1109 imply PL01X_SERIAL 1110 imply PMIC_AB8500 1111 imply RTC_PL031 1112 imply SYS_THUMB_BUILD 1113 imply SYSRESET_SYSCON 1114 1115config ARCH_VERSAL 1116 bool "Support Xilinx Versal Platform" 1117 select ARM64 1118 select CLK 1119 select DM 1120 select DM_ETH if NET 1121 select DM_MMC if MMC 1122 select DM_SERIAL 1123 select GICV3 1124 select GPIO_EXTRA_HEADER 1125 select OF_CONTROL 1126 select SOC_DEVICE 1127 imply BOARD_LATE_INIT 1128 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1129 1130config ARCH_VF610 1131 bool "Freescale Vybrid" 1132 select CPU_V7A 1133 select GPIO_EXTRA_HEADER 1134 select MACH_IMX 1135 select SYS_FSL_ERRATUM_ESDHC111 1136 imply CMD_MTDPARTS 1137 imply MTD_RAW_NAND 1138 1139config ARCH_ZYNQ 1140 bool "Xilinx Zynq based platform" 1141 select CLK 1142 select CLK_ZYNQ 1143 select CPU_V7A 1144 select DM 1145 select DM_ETH if NET 1146 select DM_MMC if MMC 1147 select DM_SERIAL 1148 select DM_SPI 1149 select DM_SPI_FLASH 1150 select GPIO_EXTRA_HEADER 1151 select OF_CONTROL 1152 select SPI 1153 select SPL_BOARD_INIT if SPL 1154 select SPL_CLK if SPL 1155 select SPL_DM if SPL 1156 select SPL_DM_SPI if SPL 1157 select SPL_DM_SPI_FLASH if SPL 1158 select SPL_OF_CONTROL if SPL 1159 select SPL_SEPARATE_BSS if SPL 1160 select SUPPORT_SPL 1161 imply ARCH_EARLY_INIT_R 1162 imply BOARD_LATE_INIT 1163 imply CMD_CLK 1164 imply CMD_DM 1165 imply CMD_SPL 1166 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1167 imply FAT_WRITE 1168 1169config ARCH_ZYNQMP_R5 1170 bool "Xilinx ZynqMP R5 based platform" 1171 select CLK 1172 select CPU_V7R 1173 select DM 1174 select DM_ETH if NET 1175 select DM_MMC if MMC 1176 select DM_SERIAL 1177 select GPIO_EXTRA_HEADER 1178 select OF_CONTROL 1179 imply CMD_DM 1180 imply DM_USB_GADGET 1181 1182config ARCH_ZYNQMP 1183 bool "Xilinx ZynqMP based platform" 1184 select ARM64 1185 select CLK 1186 select DM 1187 select DM_ETH if NET 1188 select DM_MAILBOX 1189 select DM_MMC if MMC 1190 select DM_SERIAL 1191 select DM_SPI if SPI 1192 select DM_SPI_FLASH if DM_SPI 1193 select FIRMWARE 1194 select GICV2 1195 select GPIO_EXTRA_HEADER 1196 select OF_CONTROL 1197 select SPL_BOARD_INIT if SPL 1198 select SPL_CLK if SPL 1199 select SPL_DM if SPL 1200 select SPL_DM_SPI if SPI && SPL_DM 1201 select SPL_DM_SPI_FLASH if SPL_DM_SPI 1202 select SPL_DM_MAILBOX if SPL 1203 select SPL_FIRMWARE if SPL 1204 select SPL_SEPARATE_BSS if SPL 1205 select SUPPORT_SPL 1206 select ZYNQMP_IPI 1207 select SOC_DEVICE 1208 imply BOARD_LATE_INIT 1209 imply CMD_DM 1210 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1211 imply FAT_WRITE 1212 imply MP 1213 imply DM_USB_GADGET 1214 1215config ARCH_TEGRA 1216 bool "NVIDIA Tegra" 1217 select GPIO_EXTRA_HEADER 1218 imply DISTRO_DEFAULTS 1219 imply FAT_WRITE 1220 1221config TARGET_VEXPRESS64_AEMV8A 1222 bool "Support vexpress_aemv8a" 1223 select ARM64 1224 select GPIO_EXTRA_HEADER 1225 select PL01X_SERIAL 1226 1227config TARGET_VEXPRESS64_BASE_FVP 1228 bool "Support Versatile Express ARMv8a FVP BASE model" 1229 select ARM64 1230 select GPIO_EXTRA_HEADER 1231 select PL01X_SERIAL 1232 select SEMIHOSTING 1233 1234config TARGET_VEXPRESS64_JUNO 1235 bool "Support Versatile Express Juno Development Platform" 1236 select ARM64 1237 select GPIO_EXTRA_HEADER 1238 select PL01X_SERIAL 1239 select DM 1240 select OF_CONTROL 1241 select OF_BOARD 1242 select CLK 1243 select DM_SERIAL 1244 select ARM_PSCI_FW 1245 select PSCI_RESET 1246 select DM_ETH 1247 select BLK 1248 select USB 1249 1250config TARGET_TOTAL_COMPUTE 1251 bool "Support Total Compute Platform" 1252 select ARM64 1253 select PL01X_SERIAL 1254 select DM 1255 select DM_SERIAL 1256 select DM_MMC 1257 select DM_GPIO 1258 1259config TARGET_LS2080A_EMU 1260 bool "Support ls2080a_emu" 1261 select ARCH_LS2080A 1262 select ARM64 1263 select ARMV8_MULTIENTRY 1264 select FSL_DDR_SYNC_REFRESH 1265 select GPIO_EXTRA_HEADER 1266 help 1267 Support for Freescale LS2080A_EMU platform. 1268 The LS2080A Development System (EMULATOR) is a pre-silicon 1269 development platform that supports the QorIQ LS2080A 1270 Layerscape Architecture processor. 1271 1272config TARGET_LS1088AQDS 1273 bool "Support ls1088aqds" 1274 select ARCH_LS1088A 1275 select ARM64 1276 select ARMV8_MULTIENTRY 1277 select ARCH_SUPPORT_TFABOOT 1278 select BOARD_LATE_INIT 1279 select GPIO_EXTRA_HEADER 1280 select SUPPORT_SPL 1281 select FSL_DDR_INTERACTIVE if !SD_BOOT 1282 help 1283 Support for NXP LS1088AQDS platform. 1284 The LS1088A Development System (QDS) is a high-performance 1285 development platform that supports the QorIQ LS1088A 1286 Layerscape Architecture processor. 1287 1288config TARGET_LS2080AQDS 1289 bool "Support ls2080aqds" 1290 select ARCH_LS2080A 1291 select ARM64 1292 select ARMV8_MULTIENTRY 1293 select ARCH_SUPPORT_TFABOOT 1294 select BOARD_LATE_INIT 1295 select GPIO_EXTRA_HEADER 1296 select SUPPORT_SPL 1297 imply SCSI 1298 imply SCSI_AHCI 1299 select FSL_DDR_BIST 1300 select FSL_DDR_INTERACTIVE if !SPL 1301 help 1302 Support for Freescale LS2080AQDS platform. 1303 The LS2080A Development System (QDS) is a high-performance 1304 development platform that supports the QorIQ LS2080A 1305 Layerscape Architecture processor. 1306 1307config TARGET_LS2080ARDB 1308 bool "Support ls2080ardb" 1309 select ARCH_LS2080A 1310 select ARM64 1311 select ARMV8_MULTIENTRY 1312 select ARCH_SUPPORT_TFABOOT 1313 select BOARD_LATE_INIT 1314 select SUPPORT_SPL 1315 select FSL_DDR_BIST 1316 select FSL_DDR_INTERACTIVE if !SPL 1317 select GPIO_EXTRA_HEADER 1318 imply SCSI 1319 imply SCSI_AHCI 1320 help 1321 Support for Freescale LS2080ARDB platform. 1322 The LS2080A Reference design board (RDB) is a high-performance 1323 development platform that supports the QorIQ LS2080A 1324 Layerscape Architecture processor. 1325 1326config TARGET_LS2081ARDB 1327 bool "Support ls2081ardb" 1328 select ARCH_LS2080A 1329 select ARM64 1330 select ARMV8_MULTIENTRY 1331 select BOARD_LATE_INIT 1332 select GPIO_EXTRA_HEADER 1333 select SUPPORT_SPL 1334 help 1335 Support for Freescale LS2081ARDB platform. 1336 The LS2081A Reference design board (RDB) is a high-performance 1337 development platform that supports the QorIQ LS2081A/LS2041A 1338 Layerscape Architecture processor. 1339 1340config TARGET_LX2160ARDB 1341 bool "Support lx2160ardb" 1342 select ARCH_LX2160A 1343 select ARM64 1344 select ARMV8_MULTIENTRY 1345 select ARCH_SUPPORT_TFABOOT 1346 select BOARD_LATE_INIT 1347 select GPIO_EXTRA_HEADER 1348 help 1349 Support for NXP LX2160ARDB platform. 1350 The lx2160ardb (LX2160A Reference design board (RDB) 1351 is a high-performance development platform that supports the 1352 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1353 1354config TARGET_LX2160AQDS 1355 bool "Support lx2160aqds" 1356 select ARCH_LX2160A 1357 select ARM64 1358 select ARMV8_MULTIENTRY 1359 select ARCH_SUPPORT_TFABOOT 1360 select BOARD_LATE_INIT 1361 select GPIO_EXTRA_HEADER 1362 help 1363 Support for NXP LX2160AQDS platform. 1364 The lx2160aqds (LX2160A QorIQ Development System (QDS) 1365 is a high-performance development platform that supports the 1366 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1367 1368config TARGET_LX2162AQDS 1369 bool "Support lx2162aqds" 1370 select ARCH_LX2162A 1371 select ARCH_MISC_INIT 1372 select ARM64 1373 select ARMV8_MULTIENTRY 1374 select ARCH_SUPPORT_TFABOOT 1375 select BOARD_LATE_INIT 1376 select GPIO_EXTRA_HEADER 1377 help 1378 Support for NXP LX2162AQDS platform. 1379 The lx2162aqds support is based on LX2160A Layerscape Architecture processor. 1380 1381config TARGET_HIKEY 1382 bool "Support HiKey 96boards Consumer Edition Platform" 1383 select ARM64 1384 select DM 1385 select DM_GPIO 1386 select DM_SERIAL 1387 select GPIO_EXTRA_HEADER 1388 select OF_CONTROL 1389 select PL01X_SERIAL 1390 select SPECIFY_CONSOLE_INDEX 1391 imply CMD_DM 1392 help 1393 Support for HiKey 96boards platform. It features a HI6220 1394 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. 1395 1396config TARGET_HIKEY960 1397 bool "Support HiKey960 96boards Consumer Edition Platform" 1398 select ARM64 1399 select DM 1400 select DM_SERIAL 1401 select GPIO_EXTRA_HEADER 1402 select OF_CONTROL 1403 select PL01X_SERIAL 1404 imply CMD_DM 1405 help 1406 Support for HiKey960 96boards platform. It features a HI3660 1407 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. 1408 1409config TARGET_POPLAR 1410 bool "Support Poplar 96boards Enterprise Edition Platform" 1411 select ARM64 1412 select DM 1413 select DM_SERIAL 1414 select GPIO_EXTRA_HEADER 1415 select OF_CONTROL 1416 select PL01X_SERIAL 1417 imply CMD_DM 1418 help 1419 Support for Poplar 96boards EE platform. It features a HI3798cv200 1420 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU 1421 making it capable of running any commercial set-top solution based on 1422 Linux or Android. 1423 1424config TARGET_LS1012AQDS 1425 bool "Support ls1012aqds" 1426 select ARCH_LS1012A 1427 select ARM64 1428 select ARCH_SUPPORT_TFABOOT 1429 select BOARD_LATE_INIT 1430 select GPIO_EXTRA_HEADER 1431 help 1432 Support for Freescale LS1012AQDS platform. 1433 The LS1012A Development System (QDS) is a high-performance 1434 development platform that supports the QorIQ LS1012A 1435 Layerscape Architecture processor. 1436 1437config TARGET_LS1012ARDB 1438 bool "Support ls1012ardb" 1439 select ARCH_LS1012A 1440 select ARM64 1441 select ARCH_SUPPORT_TFABOOT 1442 select BOARD_LATE_INIT 1443 select GPIO_EXTRA_HEADER 1444 imply SCSI 1445 imply SCSI_AHCI 1446 help 1447 Support for Freescale LS1012ARDB platform. 1448 The LS1012A Reference design board (RDB) is a high-performance 1449 development platform that supports the QorIQ LS1012A 1450 Layerscape Architecture processor. 1451 1452config TARGET_LS1012A2G5RDB 1453 bool "Support ls1012a2g5rdb" 1454 select ARCH_LS1012A 1455 select ARM64 1456 select ARCH_SUPPORT_TFABOOT 1457 select BOARD_LATE_INIT 1458 select GPIO_EXTRA_HEADER 1459 imply SCSI 1460 help 1461 Support for Freescale LS1012A2G5RDB platform. 1462 The LS1012A 2G5 Reference design board (RDB) is a high-performance 1463 development platform that supports the QorIQ LS1012A 1464 Layerscape Architecture processor. 1465 1466config TARGET_LS1012AFRWY 1467 bool "Support ls1012afrwy" 1468 select ARCH_LS1012A 1469 select ARM64 1470 select ARCH_SUPPORT_TFABOOT 1471 select BOARD_LATE_INIT 1472 select GPIO_EXTRA_HEADER 1473 imply SCSI 1474 imply SCSI_AHCI 1475 help 1476 Support for Freescale LS1012AFRWY platform. 1477 The LS1012A FRWY board (FRWY) is a high-performance 1478 development platform that supports the QorIQ LS1012A 1479 Layerscape Architecture processor. 1480 1481config TARGET_LS1012AFRDM 1482 bool "Support ls1012afrdm" 1483 select ARCH_LS1012A 1484 select ARM64 1485 select ARCH_SUPPORT_TFABOOT 1486 select GPIO_EXTRA_HEADER 1487 help 1488 Support for Freescale LS1012AFRDM platform. 1489 The LS1012A Freedom board (FRDM) is a high-performance 1490 development platform that supports the QorIQ LS1012A 1491 Layerscape Architecture processor. 1492 1493config TARGET_LS1028AQDS 1494 bool "Support ls1028aqds" 1495 select ARCH_LS1028A 1496 select ARM64 1497 select ARMV8_MULTIENTRY 1498 select ARCH_SUPPORT_TFABOOT 1499 select BOARD_LATE_INIT 1500 select GPIO_EXTRA_HEADER 1501 help 1502 Support for Freescale LS1028AQDS platform 1503 The LS1028A Development System (QDS) is a high-performance 1504 development platform that supports the QorIQ LS1028A 1505 Layerscape Architecture processor. 1506 1507config TARGET_LS1028ARDB 1508 bool "Support ls1028ardb" 1509 select ARCH_LS1028A 1510 select ARM64 1511 select ARMV8_MULTIENTRY 1512 select ARCH_SUPPORT_TFABOOT 1513 select BOARD_LATE_INIT 1514 select GPIO_EXTRA_HEADER 1515 help 1516 Support for Freescale LS1028ARDB platform 1517 The LS1028A Development System (RDB) is a high-performance 1518 development platform that supports the QorIQ LS1028A 1519 Layerscape Architecture processor. 1520 1521config TARGET_LS1088ARDB 1522 bool "Support ls1088ardb" 1523 select ARCH_LS1088A 1524 select ARM64 1525 select ARMV8_MULTIENTRY 1526 select ARCH_SUPPORT_TFABOOT 1527 select BOARD_LATE_INIT 1528 select SUPPORT_SPL 1529 select FSL_DDR_INTERACTIVE if !SD_BOOT 1530 select GPIO_EXTRA_HEADER 1531 help 1532 Support for NXP LS1088ARDB platform. 1533 The LS1088A Reference design board (RDB) is a high-performance 1534 development platform that supports the QorIQ LS1088A 1535 Layerscape Architecture processor. 1536 1537config TARGET_LS1021AQDS 1538 bool "Support ls1021aqds" 1539 select ARCH_LS1021A 1540 select ARCH_SUPPORT_PSCI 1541 select BOARD_EARLY_INIT_F 1542 select BOARD_LATE_INIT 1543 select CPU_V7A 1544 select CPU_V7_HAS_NONSEC 1545 select CPU_V7_HAS_VIRT 1546 select LS1_DEEP_SLEEP 1547 select SUPPORT_SPL 1548 select SYS_FSL_DDR 1549 select FSL_DDR_INTERACTIVE 1550 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1551 select GPIO_EXTRA_HEADER 1552 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI 1553 imply SCSI 1554 1555config TARGET_LS1021ATWR 1556 bool "Support ls1021atwr" 1557 select ARCH_LS1021A 1558 select ARCH_SUPPORT_PSCI 1559 select BOARD_EARLY_INIT_F 1560 select BOARD_LATE_INIT 1561 select CPU_V7A 1562 select CPU_V7_HAS_NONSEC 1563 select CPU_V7_HAS_VIRT 1564 select LS1_DEEP_SLEEP 1565 select SUPPORT_SPL 1566 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1567 select GPIO_EXTRA_HEADER 1568 imply SCSI 1569 1570config TARGET_PG_WCOM_SELI8 1571 bool "Support Hitachi-Powergrids SELI8 service unit card" 1572 select ARCH_LS1021A 1573 select ARCH_SUPPORT_PSCI 1574 select BOARD_EARLY_INIT_F 1575 select BOARD_LATE_INIT 1576 select CPU_V7A 1577 select CPU_V7_HAS_NONSEC 1578 select CPU_V7_HAS_VIRT 1579 select SYS_FSL_DDR 1580 select FSL_DDR_INTERACTIVE 1581 select GPIO_EXTRA_HEADER 1582 select VENDOR_KM 1583 imply SCSI 1584 help 1585 Support for Hitachi-Powergrids SELI8 service unit card. 1586 SELI8 is a QorIQ LS1021a based service unit card used 1587 in XMC20 and FOX615 product families. 1588 1589config TARGET_PG_WCOM_EXPU1 1590 bool "Support Hitachi-Powergrids EXPU1 service unit card" 1591 select ARCH_LS1021A 1592 select ARCH_SUPPORT_PSCI 1593 select BOARD_EARLY_INIT_F 1594 select BOARD_LATE_INIT 1595 select CPU_V7A 1596 select CPU_V7_HAS_NONSEC 1597 select CPU_V7_HAS_VIRT 1598 select SYS_FSL_DDR 1599 select FSL_DDR_INTERACTIVE 1600 select VENDOR_KM 1601 imply SCSI 1602 help 1603 Support for Hitachi-Powergrids EXPU1 service unit card. 1604 EXPU1 is a QorIQ LS1021a based service unit card used 1605 in XMC20 and FOX615 product families. 1606 1607config TARGET_LS1021ATSN 1608 bool "Support ls1021atsn" 1609 select ARCH_LS1021A 1610 select ARCH_SUPPORT_PSCI 1611 select BOARD_EARLY_INIT_F 1612 select BOARD_LATE_INIT 1613 select CPU_V7A 1614 select CPU_V7_HAS_NONSEC 1615 select CPU_V7_HAS_VIRT 1616 select LS1_DEEP_SLEEP 1617 select SUPPORT_SPL 1618 select GPIO_EXTRA_HEADER 1619 imply SCSI 1620 1621config TARGET_LS1021AIOT 1622 bool "Support ls1021aiot" 1623 select ARCH_LS1021A 1624 select ARCH_SUPPORT_PSCI 1625 select BOARD_LATE_INIT 1626 select CPU_V7A 1627 select CPU_V7_HAS_NONSEC 1628 select CPU_V7_HAS_VIRT 1629 select SUPPORT_SPL 1630 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1631 select GPIO_EXTRA_HEADER 1632 imply SCSI 1633 help 1634 Support for Freescale LS1021AIOT platform. 1635 The LS1021A Freescale board (IOT) is a high-performance 1636 development platform that supports the QorIQ LS1021A 1637 Layerscape Architecture processor. 1638 1639config TARGET_LS1043AQDS 1640 bool "Support ls1043aqds" 1641 select ARCH_LS1043A 1642 select ARM64 1643 select ARMV8_MULTIENTRY 1644 select ARCH_SUPPORT_TFABOOT 1645 select BOARD_EARLY_INIT_F 1646 select BOARD_LATE_INIT 1647 select SUPPORT_SPL 1648 select FSL_DDR_INTERACTIVE if !SPL 1649 select FSL_DSPI if !SPL_NO_DSPI 1650 select DM_SPI_FLASH if FSL_DSPI 1651 select GPIO_EXTRA_HEADER 1652 imply SCSI 1653 imply SCSI_AHCI 1654 help 1655 Support for Freescale LS1043AQDS platform. 1656 1657config TARGET_LS1043ARDB 1658 bool "Support ls1043ardb" 1659 select ARCH_LS1043A 1660 select ARM64 1661 select ARMV8_MULTIENTRY 1662 select ARCH_SUPPORT_TFABOOT 1663 select BOARD_EARLY_INIT_F 1664 select BOARD_LATE_INIT 1665 select SUPPORT_SPL 1666 select FSL_DSPI if !SPL_NO_DSPI 1667 select DM_SPI_FLASH if FSL_DSPI 1668 select GPIO_EXTRA_HEADER 1669 help 1670 Support for Freescale LS1043ARDB platform. 1671 1672config TARGET_LS1046AQDS 1673 bool "Support ls1046aqds" 1674 select ARCH_LS1046A 1675 select ARM64 1676 select ARMV8_MULTIENTRY 1677 select ARCH_SUPPORT_TFABOOT 1678 select BOARD_EARLY_INIT_F 1679 select BOARD_LATE_INIT 1680 select DM_SPI_FLASH if DM_SPI 1681 select SUPPORT_SPL 1682 select FSL_DDR_BIST if !SPL 1683 select FSL_DDR_INTERACTIVE if !SPL 1684 select FSL_DDR_INTERACTIVE if !SPL 1685 select GPIO_EXTRA_HEADER 1686 imply SCSI 1687 help 1688 Support for Freescale LS1046AQDS platform. 1689 The LS1046A Development System (QDS) is a high-performance 1690 development platform that supports the QorIQ LS1046A 1691 Layerscape Architecture processor. 1692 1693config TARGET_LS1046ARDB 1694 bool "Support ls1046ardb" 1695 select ARCH_LS1046A 1696 select ARM64 1697 select ARMV8_MULTIENTRY 1698 select ARCH_SUPPORT_TFABOOT 1699 select BOARD_EARLY_INIT_F 1700 select BOARD_LATE_INIT 1701 select DM_SPI_FLASH if DM_SPI 1702 select POWER_MC34VR500 1703 select SUPPORT_SPL 1704 select FSL_DDR_BIST 1705 select FSL_DDR_INTERACTIVE if !SPL 1706 select GPIO_EXTRA_HEADER 1707 imply SCSI 1708 help 1709 Support for Freescale LS1046ARDB platform. 1710 The LS1046A Reference Design Board (RDB) is a high-performance 1711 development platform that supports the QorIQ LS1046A 1712 Layerscape Architecture processor. 1713 1714config TARGET_LS1046AFRWY 1715 bool "Support ls1046afrwy" 1716 select ARCH_LS1046A 1717 select ARM64 1718 select ARMV8_MULTIENTRY 1719 select ARCH_SUPPORT_TFABOOT 1720 select BOARD_EARLY_INIT_F 1721 select BOARD_LATE_INIT 1722 select DM_SPI_FLASH if DM_SPI 1723 select GPIO_EXTRA_HEADER 1724 imply SCSI 1725 help 1726 Support for Freescale LS1046AFRWY platform. 1727 The LS1046A Freeway Board (FRWY) is a high-performance 1728 development platform that supports the QorIQ LS1046A 1729 Layerscape Architecture processor. 1730 1731config TARGET_SL28 1732 bool "Support sl28" 1733 select ARCH_LS1028A 1734 select ARM64 1735 select ARMV8_MULTIENTRY 1736 select SUPPORT_SPL 1737 select BINMAN 1738 select DM 1739 select DM_GPIO 1740 select DM_I2C 1741 select DM_MMC 1742 select DM_SPI_FLASH 1743 select DM_ETH 1744 select DM_MDIO 1745 select PCI 1746 select DM_RNG 1747 select DM_RTC 1748 select DM_SCSI 1749 select DM_SERIAL 1750 select DM_SPI 1751 select GPIO_EXTRA_HEADER 1752 select SPL_DM if SPL 1753 select SPL_DM_SPI if SPL 1754 select SPL_DM_SPI_FLASH if SPL 1755 select SPL_DM_I2C if SPL 1756 select SPL_DM_MMC if SPL 1757 select SPL_DM_SERIAL if SPL 1758 help 1759 Support for Kontron SMARC-sAL28 board. 1760 1761config TARGET_COLIBRI_PXA270 1762 bool "Support colibri_pxa270" 1763 select CPU_PXA 1764 select GPIO_EXTRA_HEADER 1765 1766config ARCH_UNIPHIER 1767 bool "Socionext UniPhier SoCs" 1768 select BOARD_LATE_INIT 1769 select DM 1770 select DM_ETH 1771 select DM_GPIO 1772 select DM_I2C 1773 select DM_MMC 1774 select DM_MTD 1775 select DM_RESET 1776 select DM_SERIAL 1777 select OF_BOARD_SETUP 1778 select OF_CONTROL 1779 select OF_LIBFDT 1780 select PINCTRL 1781 select SPL_BOARD_INIT if SPL 1782 select SPL_DM if SPL 1783 select SPL_LIBCOMMON_SUPPORT if SPL 1784 select SPL_LIBGENERIC_SUPPORT if SPL 1785 select SPL_OF_CONTROL if SPL 1786 select SPL_PINCTRL if SPL 1787 select SUPPORT_SPL 1788 imply CMD_DM 1789 imply DISTRO_DEFAULTS 1790 imply FAT_WRITE 1791 help 1792 Support for UniPhier SoC family developed by Socionext Inc. 1793 (formerly, System LSI Business Division of Panasonic Corporation) 1794 1795config ARCH_SYNQUACER 1796 bool "Socionext SynQuacer SoCs" 1797 select ARM64 1798 select DM 1799 select GIC_V3 1800 select PSCI_RESET 1801 select SYSRESET 1802 select SYSRESET_PSCI 1803 select OF_CONTROL 1804 help 1805 Support for SynQuacer SoC family developed by Socionext Inc. 1806 This SoC is used on 96boards EE DeveloperBox. 1807 1808config ARCH_STM32 1809 bool "Support STMicroelectronics STM32 MCU with cortex M" 1810 select CPU_V7M 1811 select DM 1812 select DM_SERIAL 1813 select GPIO_EXTRA_HEADER 1814 imply CMD_DM 1815 1816config ARCH_STI 1817 bool "Support STMicrolectronics SoCs" 1818 select BLK 1819 select CPU_V7A 1820 select DM 1821 select DM_MMC 1822 select DM_RESET 1823 select DM_SERIAL 1824 imply CMD_DM 1825 help 1826 Support for STMicroelectronics STiH407/10 SoC family. 1827 This SoC is used on Linaro 96Board STiH410-B2260 1828 1829config ARCH_STM32MP 1830 bool "Support STMicroelectronics STM32MP Socs with cortex A" 1831 select ARCH_MISC_INIT 1832 select ARCH_SUPPORT_TFABOOT 1833 select BOARD_LATE_INIT 1834 select CLK 1835 select DM 1836 select DM_GPIO 1837 select DM_RESET 1838 select DM_SERIAL 1839 select GPIO_EXTRA_HEADER 1840 select MISC 1841 select OF_CONTROL 1842 select OF_LIBFDT 1843 select OF_SYSTEM_SETUP 1844 select PINCTRL 1845 select REGMAP 1846 select SUPPORT_SPL 1847 select SYSCON 1848 select SYSRESET 1849 select SYS_THUMB_BUILD 1850 imply SPL_SYSRESET 1851 imply CMD_DM 1852 imply CMD_POWEROFF 1853 imply OF_LIBFDT_OVERLAY 1854 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1855 imply USE_PREBOOT 1856 help 1857 Support for STM32MP SoC family developed by STMicroelectronics, 1858 MPUs based on ARM cortex A core 1859 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). 1860 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot 1861 chain. 1862 SPL is the unsecure FSBL for the basic boot chain. 1863 1864config ARCH_ROCKCHIP 1865 bool "Support Rockchip SoCs" 1866 select BLK 1867 select BINMAN if SPL_OPTEE || (SPL && !ARM64) 1868 select DM 1869 select DM_GPIO 1870 select DM_I2C 1871 select DM_MMC 1872 select DM_PWM 1873 select DM_REGULATOR 1874 select DM_SERIAL 1875 select DM_SPI 1876 select DM_SPI_FLASH 1877 select ENABLE_ARM_SOC_BOOT0_HOOK 1878 select OF_CONTROL 1879 select SPI 1880 select SPL_DM if SPL 1881 select SPL_DM_SPI if SPL 1882 select SPL_DM_SPI_FLASH if SPL 1883 select SYS_MALLOC_F 1884 select SYS_THUMB_BUILD if !ARM64 1885 imply ADC 1886 imply CMD_DM 1887 imply DEBUG_UART_BOARD_INIT 1888 imply DISTRO_DEFAULTS 1889 imply FAT_WRITE 1890 imply SARADC_ROCKCHIP 1891 imply SPL_SYSRESET 1892 imply SPL_SYS_MALLOC_SIMPLE 1893 imply SYS_NS16550 1894 imply TPL_SYSRESET 1895 imply USB_FUNCTION_FASTBOOT 1896 1897config ARCH_OCTEONTX 1898 bool "Support OcteonTX SoCs" 1899 select CLK 1900 select DM 1901 select GPIO_EXTRA_HEADER 1902 select ARM64 1903 select OF_CONTROL 1904 select OF_LIVE 1905 select BOARD_LATE_INIT 1906 select SYS_CACHE_SHIFT_7 1907 1908config ARCH_OCTEONTX2 1909 bool "Support OcteonTX2 SoCs" 1910 select CLK 1911 select DM 1912 select GPIO_EXTRA_HEADER 1913 select ARM64 1914 select OF_CONTROL 1915 select OF_LIVE 1916 select BOARD_LATE_INIT 1917 select SYS_CACHE_SHIFT_7 1918 1919config TARGET_THUNDERX_88XX 1920 bool "Support ThunderX 88xx" 1921 select ARM64 1922 select GPIO_EXTRA_HEADER 1923 select OF_CONTROL 1924 select PL01X_SERIAL 1925 select SYS_CACHE_SHIFT_7 1926 1927config ARCH_ASPEED 1928 bool "Support Aspeed SoCs" 1929 select DM 1930 select OF_CONTROL 1931 imply CMD_DM 1932 1933config TARGET_DURIAN 1934 bool "Support Phytium Durian Platform" 1935 select ARM64 1936 select GPIO_EXTRA_HEADER 1937 help 1938 Support for durian platform. 1939 It has 2GB Sdram, uart and pcie. 1940 1941config TARGET_PRESIDIO_ASIC 1942 bool "Support Cortina Presidio ASIC Platform" 1943 select ARM64 1944 select GICV2 1945 1946config TARGET_XENGUEST_ARM64 1947 bool "Xen guest ARM64" 1948 select ARM64 1949 select XEN 1950 select OF_CONTROL 1951 select LINUX_KERNEL_IMAGE_HEADER 1952 select XEN_SERIAL 1953 select SSCANF 1954endchoice 1955 1956config SUPPORT_PASSING_ATAGS 1957 bool "Support pre-devicetree ATAG-based booting" 1958 depends on !ARM64 1959 imply SETUP_MEMORY_TAGS 1960 help 1961 Support for booting older Linux kernels, using ATAGs rather than 1962 passing a devicetree. This is option is rarely used, and the 1963 semantics are defined at 1964 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a. 1965 1966config SETUP_MEMORY_TAGS 1967 bool "Pass memory size information via ATAG" 1968 depends on SUPPORT_PASSING_ATAGS 1969 1970config CMDLINE_TAG 1971 bool "Pass Linux kernel cmdline via ATAG" 1972 depends on SUPPORT_PASSING_ATAGS 1973 1974config INITRD_TAG 1975 bool "Pass initrd starting point and size via ATAG" 1976 depends on SUPPORT_PASSING_ATAGS 1977 1978config REVISION_TAG 1979 bool "Pass system revision via ATAG" 1980 depends on SUPPORT_PASSING_ATAGS 1981 1982config SERIAL_TAG 1983 bool "Pass system serial number via ATAG" 1984 depends on SUPPORT_PASSING_ATAGS 1985 1986config STATIC_MACH_TYPE 1987 bool "Statically define the Machine ID number" 1988 help 1989 When booting via ATAGs, enable this option if we know the correct 1990 machine ID number to use at compile time. Some systems will be 1991 passed the number dynamically by whatever loads U-Boot. 1992 1993config MACH_TYPE 1994 int "Machine ID number" 1995 depends on STATIC_MACH_TYPE 1996 help 1997 When booting via ATAGs, the machine type must be passed as a number. 1998 For the full list see https://www.arm.linux.org.uk/developer/machines 1999 2000config ARCH_SUPPORT_TFABOOT 2001 bool 2002 2003config TFABOOT 2004 bool "Support for booting from TF-A" 2005 depends on ARCH_SUPPORT_TFABOOT 2006 help 2007 Some platforms support the setup of secure registers (for instance 2008 for CPU errata handling) or provide secure services like PSCI. 2009 Those services could also be provided by other firmware parts 2010 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot 2011 does not need to (and cannot) execute this code. 2012 Enabling this option will make a U-Boot binary that is relying 2013 on other firmware layers to provide secure functionality. 2014 2015config TI_SECURE_DEVICE 2016 bool "HS Device Type Support" 2017 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 2018 help 2019 If a high secure (HS) device type is being used, this config 2020 must be set. This option impacts various aspects of the 2021 build system (to create signed boot images that can be 2022 authenticated) and the code. See the doc/README.ti-secure 2023 file for further details. 2024 2025if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE 2026config ISW_ENTRY_ADDR 2027 hex "Address in memory or XIP address of bootloader entry point" 2028 default 0x402F4000 if AM43XX 2029 default 0x402F0400 if AM33XX 2030 default 0x40301350 if OMAP54XX 2031 help 2032 After any reset, the boot ROM searches the boot media for a valid 2033 boot image. For non-XIP devices, the ROM then copies the image into 2034 internal memory. For all boot modes, after the ROM processes the 2035 boot image it eventually computes the entry point address depending 2036 on the device type (secure/non-secure), boot media (xip/non-xip) and 2037 image headers. 2038endif 2039 2040source "arch/arm/mach-apple/Kconfig" 2041 2042source "arch/arm/mach-aspeed/Kconfig" 2043 2044source "arch/arm/mach-at91/Kconfig" 2045 2046source "arch/arm/mach-bcm283x/Kconfig" 2047 2048source "arch/arm/mach-bcmstb/Kconfig" 2049 2050source "arch/arm/mach-davinci/Kconfig" 2051 2052source "arch/arm/mach-exynos/Kconfig" 2053 2054source "arch/arm/mach-highbank/Kconfig" 2055 2056source "arch/arm/mach-integrator/Kconfig" 2057 2058source "arch/arm/mach-ipq40xx/Kconfig" 2059 2060source "arch/arm/mach-k3/Kconfig" 2061 2062source "arch/arm/mach-keystone/Kconfig" 2063 2064source "arch/arm/mach-kirkwood/Kconfig" 2065 2066source "arch/arm/mach-lpc32xx/Kconfig" 2067 2068source "arch/arm/mach-mvebu/Kconfig" 2069 2070source "arch/arm/mach-octeontx/Kconfig" 2071 2072source "arch/arm/mach-octeontx2/Kconfig" 2073 2074source "arch/arm/cpu/armv7/ls102xa/Kconfig" 2075 2076source "arch/arm/mach-imx/mx3/Kconfig" 2077 2078source "arch/arm/mach-imx/mx5/Kconfig" 2079 2080source "arch/arm/mach-imx/mx6/Kconfig" 2081 2082source "arch/arm/mach-imx/mx7/Kconfig" 2083 2084source "arch/arm/mach-imx/mx7ulp/Kconfig" 2085 2086source "arch/arm/mach-imx/imx8/Kconfig" 2087 2088source "arch/arm/mach-imx/imx8m/Kconfig" 2089 2090source "arch/arm/mach-imx/imx8ulp/Kconfig" 2091 2092source "arch/arm/mach-imx/imxrt/Kconfig" 2093 2094source "arch/arm/mach-imx/mxs/Kconfig" 2095 2096source "arch/arm/mach-omap2/Kconfig" 2097 2098source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" 2099 2100source "arch/arm/mach-orion5x/Kconfig" 2101 2102source "arch/arm/mach-owl/Kconfig" 2103 2104source "arch/arm/mach-rmobile/Kconfig" 2105 2106source "arch/arm/mach-meson/Kconfig" 2107 2108source "arch/arm/mach-mediatek/Kconfig" 2109 2110source "arch/arm/mach-qemu/Kconfig" 2111 2112source "arch/arm/mach-rockchip/Kconfig" 2113 2114source "arch/arm/mach-s5pc1xx/Kconfig" 2115 2116source "arch/arm/mach-snapdragon/Kconfig" 2117 2118source "arch/arm/mach-socfpga/Kconfig" 2119 2120source "arch/arm/mach-sti/Kconfig" 2121 2122source "arch/arm/mach-stm32/Kconfig" 2123 2124source "arch/arm/mach-stm32mp/Kconfig" 2125 2126source "arch/arm/mach-sunxi/Kconfig" 2127 2128source "arch/arm/mach-tegra/Kconfig" 2129 2130source "arch/arm/mach-u8500/Kconfig" 2131 2132source "arch/arm/mach-uniphier/Kconfig" 2133 2134source "arch/arm/cpu/armv7/vf610/Kconfig" 2135 2136source "arch/arm/mach-zynq/Kconfig" 2137 2138source "arch/arm/mach-zynqmp/Kconfig" 2139 2140source "arch/arm/mach-versal/Kconfig" 2141 2142source "arch/arm/mach-zynqmp-r5/Kconfig" 2143 2144source "arch/arm/cpu/armv7/Kconfig" 2145 2146source "arch/arm/cpu/armv8/Kconfig" 2147 2148source "arch/arm/mach-imx/Kconfig" 2149 2150source "arch/arm/mach-nexell/Kconfig" 2151 2152source "board/armltd/total_compute/Kconfig" 2153 2154source "board/bosch/shc/Kconfig" 2155source "board/bosch/guardian/Kconfig" 2156source "board/Marvell/octeontx/Kconfig" 2157source "board/Marvell/octeontx2/Kconfig" 2158source "board/armltd/vexpress/Kconfig" 2159source "board/armltd/vexpress64/Kconfig" 2160source "board/cortina/presidio-asic/Kconfig" 2161source "board/broadcom/bcm963158/Kconfig" 2162source "board/broadcom/bcm968360bg/Kconfig" 2163source "board/broadcom/bcm968580xref/Kconfig" 2164source "board/broadcom/bcmns3/Kconfig" 2165source "board/cavium/thunderx/Kconfig" 2166source "board/eets/pdu001/Kconfig" 2167source "board/emulation/qemu-arm/Kconfig" 2168source "board/freescale/ls2080aqds/Kconfig" 2169source "board/freescale/ls2080ardb/Kconfig" 2170source "board/freescale/ls1088a/Kconfig" 2171source "board/freescale/ls1028a/Kconfig" 2172source "board/freescale/ls1021aqds/Kconfig" 2173source "board/freescale/ls1043aqds/Kconfig" 2174source "board/freescale/ls1021atwr/Kconfig" 2175source "board/freescale/ls1021atsn/Kconfig" 2176source "board/freescale/ls1021aiot/Kconfig" 2177source "board/freescale/ls1046aqds/Kconfig" 2178source "board/freescale/ls1043ardb/Kconfig" 2179source "board/freescale/ls1046ardb/Kconfig" 2180source "board/freescale/ls1046afrwy/Kconfig" 2181source "board/freescale/ls1012aqds/Kconfig" 2182source "board/freescale/ls1012ardb/Kconfig" 2183source "board/freescale/ls1012afrdm/Kconfig" 2184source "board/freescale/lx2160a/Kconfig" 2185source "board/grinn/chiliboard/Kconfig" 2186source "board/hisilicon/hikey/Kconfig" 2187source "board/hisilicon/hikey960/Kconfig" 2188source "board/hisilicon/poplar/Kconfig" 2189source "board/isee/igep003x/Kconfig" 2190source "board/kontron/sl28/Kconfig" 2191source "board/myir/mys_6ulx/Kconfig" 2192source "board/seeed/npi_imx6ull/Kconfig" 2193source "board/socionext/developerbox/Kconfig" 2194source "board/st/stv0991/Kconfig" 2195source "board/tcl/sl50/Kconfig" 2196source "board/toradex/colibri_pxa270/Kconfig" 2197source "board/variscite/dart_6ul/Kconfig" 2198source "board/vscom/baltos/Kconfig" 2199source "board/phytium/durian/Kconfig" 2200source "board/xen/xenguest_arm64/Kconfig" 2201source "board/keymile/Kconfig" 2202 2203source "arch/arm/Kconfig.debug" 2204 2205endmenu 2206 2207config SPL_LDSCRIPT 2208 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK 2209 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 2210 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 2211