1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Samsung Electronics 4 * 5 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board. 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include "exynos4-common.h" 12 13 #undef CONFIG_BOARD_COMMON 14 #undef CONFIG_USB_GADGET_DWC2_OTG_PHY 15 16 /* High Level Configuration Options */ 17 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ 18 19 #define CONFIG_SYS_SDRAM_BASE 0x40000000 20 21 /* Handling Sleep Mode*/ 22 #define S5P_CHECK_SLEEP 0x00000BAD 23 #define S5P_CHECK_DIDLE 0xBAD00000 24 #define S5P_CHECK_LPA 0xABAD0000 25 26 /* MMC SPL */ 27 #define COPY_BL2_FNPTR_ADDR 0x00002488 28 29 #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" 30 31 /* SMDKV310 has 4 bank of DRAM */ 32 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ 33 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 34 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE 35 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) 36 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE 37 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) 38 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE 39 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) 40 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE 41 42 /* FLASH and environment organization */ 43 44 #define CONFIG_CLK_1000_400_200 45 46 /* MIU (Memory Interleaving Unit) */ 47 #define CONFIG_MIU_2BIT_INTERLEAVED 48 49 #define RESERVE_BLOCK_SIZE (512) 50 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ 51 52 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) 53 54 #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 55 56 /* U-Boot copy size from boot Media to DRAM.*/ 57 #define COPY_BL2_SIZE 0x80000 58 #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) 59 #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) 60 61 /* Ethernet Controllor Driver */ 62 #ifdef CONFIG_CMD_NET 63 #define CONFIG_ENV_SROM_BANK 1 64 #endif /*CONFIG_CMD_NET*/ 65 66 #endif /* __CONFIG_H */ 67