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Searched defs:GICC_BASE (Results 1 – 15 of 15) sorted by relevance

/u-boot-v2022.01-rc1/include/configs/
A Dsun50i.h15 #define GICC_BASE 0x1c82000 macro
18 #define GICC_BASE 0x3022000 macro
A Dmeson64.h13 #define GICC_BASE 0xffc02000 macro
16 #define GICC_BASE 0xc4302000 macro
A Dhikey960.h32 #define GICC_BASE 0xe82b2000 macro
A Dhikey.h42 #define GICC_BASE 0xf6802000 macro
A Dpx30_common.h29 #define GICC_BASE 0xff132000 macro
A Dvexpress_aemv8a.h81 #define GICC_BASE (0x2c000000) macro
84 #define GICC_BASE (0x2C02f000) macro
A Drcar-gen3-common.h26 #define GICC_BASE 0xF1020000 macro
A Dpresidio_asic.h27 #define GICC_BASE 0xf7012000 macro
A Dxilinx_zynqmp.h19 #define GICC_BASE 0xF9020000 macro
/u-boot-v2022.01-rc1/arch/arm/include/asm/arch-tegra186/
A Dtegra.h10 #define GICC_BASE 0x03882000 /* Generic Int Cntrlr CPU I/F */ macro
/u-boot-v2022.01-rc1/arch/arm/include/asm/arch-tegra210/
A Dtegra.h11 #define GICC_BASE 0x50042000 /* Generic Int Cntrlr CPU I/F */ macro
/u-boot-v2022.01-rc1/arch/arm/mach-snapdragon/include/mach/
A Dsysmap-apq8016.h11 #define GICC_BASE (0x0b002000) macro
/u-boot-v2022.01-rc1/arch/arm/mach-socfpga/include/mach/
A Dbase_addr_soc64.h46 #define GICC_BASE 0xfffc2000 macro
/u-boot-v2022.01-rc1/arch/arm/include/asm/arch-fsl-layerscape/
A Dconfig.h336 #define GICC_BASE 0x01402000 macro
364 #define GICC_BASE 0x01402000 macro
395 #define GICC_BASE 0x01420000 macro
/u-boot-v2022.01-rc1/arch/arm/cpu/armv7/sunxi/
A Dpsci.c28 #define GICC_BASE (SUNXI_GIC400_BASE + GIC_CPU_OFFSET_A15) macro

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