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Searched defs:TIM_DCR_DBL_2 (Results 1 – 22 of 22) sorted by relevance

/lk-master/external/platform/stm32f0xx/CMSIS/inc/
A Dstm32f030x6.h4727 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f030x8.h4762 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f070x6.h4802 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f070xb.h4954 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f030xc.h5095 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f031x6.h4921 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f038xx.h4890 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f051x8.h5409 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f058xx.h5378 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f071xb.h5962 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f048xx.h9135 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f072xb.h9746 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f078xx.h9716 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f042x6.h9171 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f091xc.h10411 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
A Dstm32f098xx.h10378 #define TIM_DCR_DBL_2 (0x04U << TIM_DCR_DBL_Pos) /*!< 0x00000400 */ macro
/lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/CMSIS/
A Dstm32f2xx.h6306 #define TIM_DCR_DBL_2 ((uint16_t)0x0400) /*!<Bit 2 */ macro
/lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/CMSIS/
A Dstm32f10x.h4456 #define TIM_DCR_DBL_2 ((uint16_t)0x0400) /*!<Bit 2 */ macro
/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/CMSIS/
A Dstm32f745xx.h7241 #define TIM_DCR_DBL_2 ((uint32_t)0x0400) /*!<Bit 2 */ macro
A Dstm32f756xx.h7634 #define TIM_DCR_DBL_2 ((uint32_t)0x0400) /*!<Bit 2 */ macro
A Dstm32f746xx.h7448 #define TIM_DCR_DBL_2 ((uint32_t)0x0400) /*!<Bit 2 */ macro
/lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/CMSIS/
A Dstm32f4xx.h9298 #define TIM_DCR_DBL_2 ((uint16_t)0x0400) /*!<Bit 2 */ macro

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