1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
3
4 #include <linux/timer.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/if_vlan.h>
12 #include <linux/phylink.h>
13 #include <linux/dim.h>
14
15 #include "enetc_hw.h"
16
17 #define ENETC_MAC_MAXFRM_SIZE 9600
18 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
19 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
20
21 #define ENETC_CBD_DATA_MEM_ALIGN 64
22
23 struct enetc_tx_swbd {
24 union {
25 struct sk_buff *skb;
26 struct xdp_frame *xdp_frame;
27 };
28 dma_addr_t dma;
29 struct page *page; /* valid only if is_xdp_tx */
30 u16 page_offset; /* valid only if is_xdp_tx */
31 u16 len;
32 enum dma_data_direction dir;
33 u8 is_dma_page:1;
34 u8 check_wb:1;
35 u8 do_twostep_tstamp:1;
36 u8 is_eof:1;
37 u8 is_xdp_tx:1;
38 u8 is_xdp_redirect:1;
39 u8 qbv_en:1;
40 };
41
42 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
43 #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
44 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
45 #define ENETC_RXB_DMA_SIZE \
46 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
47 #define ENETC_RXB_DMA_SIZE_XDP \
48 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
49
50 struct enetc_rx_swbd {
51 dma_addr_t dma;
52 struct page *page;
53 u16 page_offset;
54 enum dma_data_direction dir;
55 u16 len;
56 };
57
58 /* ENETC overhead: optional extension BD + 1 BD gap */
59 #define ENETC_TXBDS_NEEDED(val) ((val) + 2)
60 /* max # of chained Tx BDs is 15, including head and extension BD */
61 #define ENETC_MAX_SKB_FRAGS 13
62 #define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1)
63
64 struct enetc_ring_stats {
65 unsigned int packets;
66 unsigned int bytes;
67 unsigned int rx_alloc_errs;
68 unsigned int xdp_drops;
69 unsigned int xdp_tx;
70 unsigned int xdp_tx_drops;
71 unsigned int xdp_redirect;
72 unsigned int xdp_redirect_failures;
73 unsigned int recycles;
74 unsigned int recycle_failures;
75 unsigned int win_drop;
76 };
77
78 struct enetc_xdp_data {
79 struct xdp_rxq_info rxq;
80 struct bpf_prog *prog;
81 int xdp_tx_in_flight;
82 };
83
84 #define ENETC_RX_RING_DEFAULT_SIZE 2048
85 #define ENETC_TX_RING_DEFAULT_SIZE 2048
86 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
87
88 struct enetc_bdr_resource {
89 /* Input arguments saved for teardown */
90 struct device *dev; /* for DMA mapping */
91 size_t bd_count;
92 size_t bd_size;
93
94 /* Resource proper */
95 void *bd_base; /* points to Rx or Tx BD ring */
96 dma_addr_t bd_dma_base;
97 union {
98 struct enetc_tx_swbd *tx_swbd;
99 struct enetc_rx_swbd *rx_swbd;
100 };
101 char *tso_headers;
102 dma_addr_t tso_headers_dma;
103 };
104
105 struct enetc_bdr {
106 struct device *dev; /* for DMA mapping */
107 struct net_device *ndev;
108 void *bd_base; /* points to Rx or Tx BD ring */
109 union {
110 void __iomem *tpir;
111 void __iomem *rcir;
112 };
113 u16 index;
114 u16 prio;
115 int bd_count; /* # of BDs */
116 int next_to_use;
117 int next_to_clean;
118 union {
119 struct enetc_tx_swbd *tx_swbd;
120 struct enetc_rx_swbd *rx_swbd;
121 };
122 union {
123 void __iomem *tcir; /* Tx */
124 int next_to_alloc; /* Rx */
125 };
126 void __iomem *idr; /* Interrupt Detect Register pointer */
127
128 int buffer_offset;
129 struct enetc_xdp_data xdp;
130
131 struct enetc_ring_stats stats;
132
133 dma_addr_t bd_dma_base;
134 u8 tsd_enable; /* Time specific departure */
135 bool ext_en; /* enable h/w descriptor extensions */
136
137 /* DMA buffer for TSO headers */
138 char *tso_headers;
139 dma_addr_t tso_headers_dma;
140 } ____cacheline_aligned_in_smp;
141
enetc_bdr_idx_inc(struct enetc_bdr * bdr,int * i)142 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
143 {
144 if (unlikely(++*i == bdr->bd_count))
145 *i = 0;
146 }
147
enetc_bd_unused(struct enetc_bdr * bdr)148 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
149 {
150 if (bdr->next_to_clean > bdr->next_to_use)
151 return bdr->next_to_clean - bdr->next_to_use - 1;
152
153 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
154 }
155
enetc_swbd_unused(struct enetc_bdr * bdr)156 static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
157 {
158 if (bdr->next_to_clean > bdr->next_to_alloc)
159 return bdr->next_to_clean - bdr->next_to_alloc - 1;
160
161 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
162 }
163
164 /* Control BD ring */
165 #define ENETC_CBDR_DEFAULT_SIZE 64
166 struct enetc_cbdr {
167 void *bd_base; /* points to Rx or Tx BD ring */
168 void __iomem *pir;
169 void __iomem *cir;
170 void __iomem *mr; /* mode register */
171
172 int bd_count; /* # of BDs */
173 int next_to_use;
174 int next_to_clean;
175
176 dma_addr_t bd_dma_base;
177 struct device *dma_dev;
178 };
179
180 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
181
enetc_rxbd(struct enetc_bdr * rx_ring,int i)182 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
183 {
184 int hw_idx = i;
185
186 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
187 if (rx_ring->ext_en)
188 hw_idx = 2 * i;
189 #endif
190 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
191 }
192
enetc_rxbd_next(struct enetc_bdr * rx_ring,union enetc_rx_bd ** old_rxbd,int * old_index)193 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
194 union enetc_rx_bd **old_rxbd, int *old_index)
195 {
196 union enetc_rx_bd *new_rxbd = *old_rxbd;
197 int new_index = *old_index;
198
199 new_rxbd++;
200
201 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
202 if (rx_ring->ext_en)
203 new_rxbd++;
204 #endif
205
206 if (unlikely(++new_index == rx_ring->bd_count)) {
207 new_rxbd = rx_ring->bd_base;
208 new_index = 0;
209 }
210
211 *old_rxbd = new_rxbd;
212 *old_index = new_index;
213 }
214
enetc_rxbd_ext(union enetc_rx_bd * rxbd)215 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
216 {
217 return ++rxbd;
218 }
219
220 struct enetc_msg_swbd {
221 void *vaddr;
222 dma_addr_t dma;
223 int size;
224 };
225
226 #define ENETC_REV1 0x1
227 enum enetc_errata {
228 ENETC_ERR_VLAN_ISOL = BIT(0),
229 ENETC_ERR_UCMCSWP = BIT(1),
230 };
231
232 #define ENETC_SI_F_PSFP BIT(0)
233 #define ENETC_SI_F_QBV BIT(1)
234 #define ENETC_SI_F_QBU BIT(2)
235
236 /* PCI IEP device data */
237 struct enetc_si {
238 struct pci_dev *pdev;
239 struct enetc_hw hw;
240 enum enetc_errata errata;
241
242 struct net_device *ndev; /* back ref. */
243
244 struct enetc_cbdr cbd_ring;
245
246 int num_rx_rings; /* how many rings are available in the SI */
247 int num_tx_rings;
248 int num_fs_entries;
249 int num_rss; /* number of RSS buckets */
250 unsigned short pad;
251 int hw_features;
252 };
253
254 #define ENETC_SI_ALIGN 32
255
enetc_si_priv(const struct enetc_si * si)256 static inline void *enetc_si_priv(const struct enetc_si *si)
257 {
258 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
259 }
260
enetc_si_is_pf(struct enetc_si * si)261 static inline bool enetc_si_is_pf(struct enetc_si *si)
262 {
263 return !!(si->hw.port);
264 }
265
enetc_pf_to_port(struct pci_dev * pf_pdev)266 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
267 {
268 switch (pf_pdev->devfn) {
269 case 0:
270 return 0;
271 case 1:
272 return 1;
273 case 2:
274 return 2;
275 case 6:
276 return 3;
277 default:
278 return -1;
279 }
280 }
281
282 #define ENETC_MAX_NUM_TXQS 8
283 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
284
285 struct enetc_int_vector {
286 void __iomem *rbier;
287 void __iomem *tbier_base;
288 void __iomem *ricr1;
289 unsigned long tx_rings_map;
290 int count_tx_rings;
291 u32 rx_ictt;
292 u16 comp_cnt;
293 bool rx_dim_en, rx_napi_work;
294 struct napi_struct napi ____cacheline_aligned_in_smp;
295 struct dim rx_dim ____cacheline_aligned_in_smp;
296 char name[ENETC_INT_NAME_MAX];
297
298 struct enetc_bdr rx_ring;
299 struct enetc_bdr tx_ring[];
300 } ____cacheline_aligned_in_smp;
301
302 struct enetc_cls_rule {
303 struct ethtool_rx_flow_spec fs;
304 int used;
305 };
306
307 #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */
308 struct psfp_cap {
309 u32 max_streamid;
310 u32 max_psfp_filter;
311 u32 max_psfp_gate;
312 u32 max_psfp_gatelist;
313 u32 max_psfp_meter;
314 };
315
316 #define ENETC_F_TX_TSTAMP_MASK 0xff
317 enum enetc_active_offloads {
318 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
319 ENETC_F_TX_TSTAMP = BIT(0),
320 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),
321
322 ENETC_F_RX_TSTAMP = BIT(8),
323 ENETC_F_QBV = BIT(9),
324 ENETC_F_QCI = BIT(10),
325 ENETC_F_QBU = BIT(11),
326 };
327
328 enum enetc_flags_bit {
329 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
330 };
331
332 /* interrupt coalescing modes */
333 enum enetc_ic_mode {
334 /* one interrupt per frame */
335 ENETC_IC_NONE = 0,
336 /* activated when int coalescing time is set to a non-0 value */
337 ENETC_IC_RX_MANUAL = BIT(0),
338 ENETC_IC_TX_MANUAL = BIT(1),
339 /* use dynamic interrupt moderation */
340 ENETC_IC_RX_ADAPTIVE = BIT(2),
341 };
342
343 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
344 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
345 #define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600)
346
347 struct enetc_ndev_priv {
348 struct net_device *ndev;
349 struct device *dev; /* dma-mapping device */
350 struct enetc_si *si;
351
352 int bdr_int_num; /* number of Rx/Tx ring interrupts */
353 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
354 u16 num_rx_rings, num_tx_rings;
355 u16 rx_bd_count, tx_bd_count;
356
357 u16 msg_enable;
358 enum enetc_active_offloads active_offloads;
359
360 u32 speed; /* store speed for compare update pspeed */
361
362 struct enetc_bdr **xdp_tx_ring;
363 struct enetc_bdr *tx_ring[16];
364 struct enetc_bdr *rx_ring[16];
365 const struct enetc_bdr_resource *tx_res;
366 const struct enetc_bdr_resource *rx_res;
367
368 struct enetc_cls_rule *cls_rules;
369
370 struct psfp_cap psfp_cap;
371
372 /* Minimum number of TX queues required by the network stack */
373 unsigned int min_num_stack_tx_queues;
374
375 struct phylink *phylink;
376 int ic_mode;
377 u32 tx_ictt;
378
379 struct bpf_prog *xdp_prog;
380
381 unsigned long flags;
382
383 struct work_struct tx_onestep_tstamp;
384 struct sk_buff_head tx_skbs;
385
386 /* Serialize access to MAC Merge state between ethtool requests
387 * and link state updates
388 */
389 struct mutex mm_lock;
390 };
391
392 /* Messaging */
393
394 /* VF-PF set primary MAC address message format */
395 struct enetc_msg_cmd_set_primary_mac {
396 struct enetc_msg_cmd_header header;
397 struct sockaddr mac;
398 };
399
400 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
401
402 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */
403
404 /* PTP driver exports */
405 extern int enetc_phc_index;
406
407 /* SI common */
408 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);
409 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);
410 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
411 void enetc_pci_remove(struct pci_dev *pdev);
412 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
413 void enetc_free_msix(struct enetc_ndev_priv *priv);
414 void enetc_get_si_caps(struct enetc_si *si);
415 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
416 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
417 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
418 int enetc_configure_si(struct enetc_ndev_priv *priv);
419
420 int enetc_open(struct net_device *ndev);
421 int enetc_close(struct net_device *ndev);
422 void enetc_start(struct net_device *ndev);
423 void enetc_stop(struct net_device *ndev);
424 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
425 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
426 void enetc_set_features(struct net_device *ndev, netdev_features_t features);
427 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
428 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
429 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);
430 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
431 struct xdp_frame **frames, u32 flags);
432
433 /* ethtool */
434 void enetc_set_ethtool_ops(struct net_device *ndev);
435 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);
436
437 /* control buffer descriptor ring (CBDR) */
438 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
439 struct enetc_cbdr *cbdr);
440 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
441 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
442 char *mac_addr, int si_map);
443 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
444 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
445 int index);
446 void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
447 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
448 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
449 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
450
enetc_cbd_alloc_data_mem(struct enetc_si * si,struct enetc_cbd * cbd,int size,dma_addr_t * dma,void ** data_align)451 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
452 struct enetc_cbd *cbd,
453 int size, dma_addr_t *dma,
454 void **data_align)
455 {
456 struct enetc_cbdr *ring = &si->cbd_ring;
457 dma_addr_t dma_align;
458 void *data;
459
460 data = dma_alloc_coherent(ring->dma_dev,
461 size + ENETC_CBD_DATA_MEM_ALIGN,
462 dma, GFP_KERNEL);
463 if (!data) {
464 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
465 return NULL;
466 }
467
468 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
469 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
470
471 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
472 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
473 cbd->length = cpu_to_le16(size);
474
475 return data;
476 }
477
enetc_cbd_free_data_mem(struct enetc_si * si,int size,void * data,dma_addr_t * dma)478 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
479 void *data, dma_addr_t *dma)
480 {
481 struct enetc_cbdr *ring = &si->cbd_ring;
482
483 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
484 data, *dma);
485 }
486
487 void enetc_reset_ptcmsdur(struct enetc_hw *hw);
488 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
489
490 #ifdef CONFIG_FSL_ENETC_QOS
491 int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
492 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
493 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
494 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
495 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
496 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
497 void *cb_priv);
498 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
499 int enetc_psfp_init(struct enetc_ndev_priv *priv);
500 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
501 int enetc_set_psfp(struct net_device *ndev, bool en);
502
enetc_get_max_cap(struct enetc_ndev_priv * priv)503 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
504 {
505 struct enetc_hw *hw = &priv->si->hw;
506 u32 reg;
507
508 reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
509 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
510 /* Port stream filter capability */
511 reg = enetc_port_rd(hw, ENETC_PSFCAPR);
512 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
513 /* Port stream gate capability */
514 reg = enetc_port_rd(hw, ENETC_PSGCAPR);
515 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
516 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
517 /* Port flow meter capability */
518 reg = enetc_port_rd(hw, ENETC_PFMCAPR);
519 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
520 }
521
enetc_psfp_enable(struct enetc_ndev_priv * priv)522 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
523 {
524 struct enetc_hw *hw = &priv->si->hw;
525 int err;
526
527 enetc_get_max_cap(priv);
528
529 err = enetc_psfp_init(priv);
530 if (err)
531 return err;
532
533 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
534 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
535 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
536
537 return 0;
538 }
539
enetc_psfp_disable(struct enetc_ndev_priv * priv)540 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
541 {
542 struct enetc_hw *hw = &priv->si->hw;
543 int err;
544
545 err = enetc_psfp_clean(priv);
546 if (err)
547 return err;
548
549 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
550 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
551 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
552
553 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
554
555 return 0;
556 }
557
558 #else
559 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
560 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
561 #define enetc_sched_speed_set(priv, speed) (void)0
562 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
563 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
564 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
565 #define enetc_setup_tc_block_cb NULL
566
567 #define enetc_get_max_cap(p) \
568 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
569
enetc_psfp_enable(struct enetc_ndev_priv * priv)570 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
571 {
572 return 0;
573 }
574
enetc_psfp_disable(struct enetc_ndev_priv * priv)575 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
576 {
577 return 0;
578 }
579
enetc_set_psfp(struct net_device * ndev,bool en)580 static inline int enetc_set_psfp(struct net_device *ndev, bool en)
581 {
582 return 0;
583 }
584 #endif
585