| /u-boot-v2022.01-rc1/arch/arm/mach-socfpga/ |
| A D | clock_manager_gen5.c | 347 u32 reg, clock; in cm_get_main_vco_clk_hz() local
362 u32 reg, clock = 0; in cm_get_per_vco_clk_hz() local
387 u32 reg, clock; in cm_get_mpu_clk_hz() local
401 u32 reg, clock = 0; in cm_get_sdram_clk_hz() local
432 u32 reg, clock = 0; in cm_get_l4_sp_clk_hz() local
469 u32 reg, clock = 0; in cm_get_mmc_controller_clk_hz() local
501 u32 reg, clock = 0; in cm_get_qspi_controller_clk_hz() local
531 u32 reg, clock = 0; in cm_get_spi_controller_clk_hz() local
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| A D | clock_manager_s10.c | 263 unsigned long clock = readl(socfpga_get_clkmgr_addr() + in cm_get_mpu_clk_hz() local
303 u32 clock = readl(socfpga_get_clkmgr_addr() + in cm_get_l3_main_clk_hz() local
342 u32 clock = readl(socfpga_get_clkmgr_addr() + in cm_get_mmc_controller_clk_hz() local
379 u32 clock = cm_get_l3_main_clk_hz(); in cm_get_l4_sp_clk_hz() local
389 u32 clock = cm_get_l3_main_clk_hz(); in cm_get_spi_controller_clk_hz() local
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| A D | wrap_pll_config_soc64.c | 38 u32 clock = readl(SOC64_HANDOFF_CLOCK_OSC); in cm_get_osc_clk_hz() local
55 u32 clock = readl(SOC64_HANDOFF_CLOCK_FPGA); in cm_get_fpga_clk_hz() local
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| /u-boot-v2022.01-rc1/drivers/clk/altera/ |
| A D | clk-n5x.c | 147 u64 clock = 0; in clk_get_pll_output_hz() local
191 u64 clock = 0; in clk_get_clksrc_hz() local
237 u64 clock = clk_get_clksrc_hz(plat, CLKMGR_MAINPLL_MPUCLK, in clk_get_mpu_clk_hz() local
262 u64 clock = clk_get_l3_main_clk_hz(plat); in clk_get_l4_main_clk_hz() local
281 u64 clock = clk_get_clksrc_hz(plat, CLKMGR_ALTR_SDMMCCTR, in clk_get_sdmmc_clk_hz() local
292 u64 clock = clk_get_l3_main_clk_hz(plat); in clk_get_l4_sp_clk_hz() local
303 u64 clock = clk_get_l3_main_clk_hz(plat); in clk_get_l4_mp_clk_hz() local
325 u32 clock; in clk_get_emac_clk_hz() local
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| A D | clk-agilex.c | 401 u64 clock; in clk_get_clksrc_hz() local
437 u64 clock = clk_get_clksrc_hz(plat, CLKMGR_MAINPLL_MPUCLK, in clk_get_mpu_clk_hz() local
456 u64 clock = clk_get_l3_main_clk_hz(plat); in clk_get_l4_main_clk_hz() local
467 u64 clock = clk_get_clksrc_hz(plat, CLKMGR_ALTR_SDMMCCTR, in clk_get_sdmmc_clk_hz() local
479 u64 clock = clk_get_l3_main_clk_hz(plat); in clk_get_l4_sp_clk_hz() local
490 u64 clock = clk_get_l3_main_clk_hz(plat); in clk_get_l4_mp_clk_hz() local
512 u32 clock; in clk_get_emac_clk_hz() local
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| /u-boot-v2022.01-rc1/board/freescale/corenet_ds/ |
| A D | corenet_ds.c | 67 unsigned int clock = (sw >> (6 - (2 * i))) & 3; in checkboard() local
147 unsigned int clock = (sw >> (6 - (2 * i))) & 3; in misc_init_r() local
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| /u-boot-v2022.01-rc1/test/dm/ |
| A D | simple-pm-bus.c | 21 struct udevice *clock; in dm_test_simple_pm_bus() local
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| /u-boot-v2022.01-rc1/board/freescale/p2041rdb/ |
| A D | p2041rdb.c | 57 unsigned int clock = (sw >> (2 * i)) & 3; in checkboard() local
181 unsigned int clock = (sw >> (2 * i)) & 3; in misc_init_r() local
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| /u-boot-v2022.01-rc1/arch/arm/dts/ |
| A D | exynos4x12.dtsi | 37 clock: clock-controller@10030000 { label
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| A D | exynos4210.dtsi | 65 clock: clock-controller@10030000 { label
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| /u-boot-v2022.01-rc1/include/dm/platform_data/ |
| A D | serial_bcm283x_mu.h | 19 unsigned int clock; member
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| A D | serial_pl01x.h | 26 unsigned int clock; member
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| /u-boot-v2022.01-rc1/drivers/serial/ |
| A D | serial_sifive.c | 42 unsigned long clock; member
72 unsigned long clock, unsigned long baud) in _sifive_serial_setbrg()
110 u32 clock = 0; in sifive_serial_setbrg() local
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| A D | serial_pl01x.c | 109 int clock, int baudrate) in pl01x_generic_setbrg()
192 int clock = 0; in pl01x_serial_init_baud() local
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| A D | serial_zynq.c | 60 unsigned long clock, unsigned long baud) in _uart_zynq_serial_setbrg()
121 unsigned long clock; in zynq_serial_setbrg() local
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| /u-boot-v2022.01-rc1/drivers/timer/ |
| A D | mpc83xx_timer.c | 108 struct clk clock; in interrupt_init() local
215 struct clk clock; in mpc83xx_timer_probe() local
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| /u-boot-v2022.01-rc1/arch/powerpc/cpu/mpc8xx/ |
| A D | cpu.c | 117 static int check_CPU(long clock, uint pvr, uint immr) in check_CPU()
172 ulong clock = gd->cpu_clk; in checkcpu() local
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| /u-boot-v2022.01-rc1/drivers/ufs/ |
| A D | ti-j721e-ufs.c | 21 unsigned int clock; in ti_j721e_ufs_probe() local
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| /u-boot-v2022.01-rc1/drivers/mmc/ |
| A D | rockchip_sdhci.c | 103 static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock) in rk3399_emmc_phy_power_on()
185 static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock) in rk3399_sdhci_emmc_set_clock()
213 static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock) in rk3568_sdhci_emmc_set_clock()
277 uint clock = mmc->tran_speed; in rockchip_sdhci_set_ios_post() local
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| A D | hi6220_dw_mmc.c | 27 unsigned int clock; member
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| /u-boot-v2022.01-rc1/arch/mips/dts/ |
| A D | pic32mzda.dtsi | 39 clock: clk@1f801200 { label
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| /u-boot-v2022.01-rc1/arch/arm/cpu/armv7/ls102xa/ |
| A D | fsl_ls1_serdes.c | 120 const char *serdes_clock_to_string(u32 clock) in serdes_clock_to_string()
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| /u-boot-v2022.01-rc1/drivers/video/sunxi/ |
| A D | sunxi_dw_hdmi.c | 42 static int sunxi_dw_hdmi_get_divider(uint clock) in sunxi_dw_hdmi_get_divider()
116 static void sunxi_dw_hdmi_phy_set(uint clock, int phy_div) in sunxi_dw_hdmi_phy_set()
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| /u-boot-v2022.01-rc1/arch/arm/cpu/armv7/bcm235xx/ |
| A D | clk-core.c | 170 const char **clock; in peri_clk_set_rate() local
212 const char **clock; in peri_clk_get_rate() local
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| /u-boot-v2022.01-rc1/arch/arm/cpu/armv7/bcm281xx/ |
| A D | clk-core.c | 170 const char **clock; in peri_clk_set_rate() local
212 const char **clock; in peri_clk_get_rate() local
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