| /u-boot-v2022.01-rc1/arch/powerpc/include/asm/ |
| A D | mpc8xxx_spi.h | 26 u32 rx; /* receive register */ member
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| A D | immap_85xx.h | 173 u32 rx; /* eSPI receive FIFO access */ member
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| /u-boot-v2022.01-rc1/arch/arm/include/asm/arch-lpc32xx/ |
| A D | i2c.h | 9 u32 rx; member
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| A D | uart.h | 14 u32 rx; /* Receiver FIFO */ member
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| /u-boot-v2022.01-rc1/drivers/spi/ |
| A D | omap3_spi.c | 150 unsigned int *rx = &priv->regs->channel[priv->cs].rx; in omap3_spi_read() local
217 unsigned int *rx = &priv->regs->channel[priv->cs].rx; in omap3_spi_txrx() local
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| A D | ath79_spi.c | 63 u8 *rx = din; in ath79_spi_xfer() local
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| A D | mscc_bb_spi.c | 135 u32 rx = 0, mask = 0x80, value; in mscc_bb_spi_xfer() local
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| A D | designware_spi.c | 135 void *rx; member
486 u8 *rx = din; in dw_spi_xfer() local
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| A D | bcm63xx_hsspi.c | 226 uint8_t *rx = din; in bcm63xx_hsspi_xfer() local
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| A D | pic32_spi.c | 76 const void *rx; member
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| A D | octeon_spi.c | 439 void *rx; in octeon_spi_exec_op() local
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| A D | spi-synquacer.c | 176 static void synquacer_spi_config(struct udevice *dev, void *rx, const void *tx) in synquacer_spi_config()
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| /u-boot-v2022.01-rc1/drivers/mtd/spi/ |
| A D | sandbox.c | 234 static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, in sandbox_sf_process_cmd()
319 const uint8_t *rx = rxp; in sandbox_sf_xfer() local
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| /u-boot-v2022.01-rc1/include/ |
| A D | omap3_spi.h | 55 unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ member
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| /u-boot-v2022.01-rc1/drivers/net/pfe_eth/ |
| A D | pfe_cmd.c | 285 u32 rx; in pfe_pe_status() local
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| /u-boot-v2022.01-rc1/board/gdsys/common/ |
| A D | cmd_ioloop.c | 197 u16 rx; in io_receive() local
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| /u-boot-v2022.01-rc1/drivers/net/ |
| A D | mpc8xx_fec.c | 237 uchar *rx = net_rx_packets[rxIdx]; in fec_recv() local
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| A D | macb.c | 292 static inline void macb_invalidate_ring_desc(struct macb_device *macb, bool rx) in macb_invalidate_ring_desc()
304 static inline void macb_flush_ring_desc(struct macb_device *macb, bool rx) in macb_flush_ring_desc()
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| A D | gmac_rockchip.c | 34 #define DELAY_ENABLE(soc, tx, rx) \ argument
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| A D | ftgmac100.h | 62 unsigned int rx; /* 0xb0 */ member
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| A D | dwc_eth_qos.c | 356 unsigned int num, bool rx) in eqos_get_desc()
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| /u-boot-v2022.01-rc1/drivers/net/octeontx/ |
| A D | nicvf_queues.h | 195 } rx; member
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| A D | nic.h | 424 u8 rx; member
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| /u-boot-v2022.01-rc1/include/linux/ |
| A D | immap_qe.h | 240 u8 rx[0x400]; member
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| /u-boot-v2022.01-rc1/arch/mips/mach-octeon/include/mach/ |
| A D | cvmx-agl-defs.h | 1716 u64 rx : 2; member
1724 u64 rx : 1; member
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