1 /*
2  * Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <endian.h>
9 #include <errno.h>
10 #include <string.h>
11 
12 #include <arch_helpers.h>
13 #include <common/debug.h>
14 #include <drivers/delay_timer.h>
15 #include <drivers/st/stm32_iwdg.h>
16 #include <drivers/st/stm32_uart.h>
17 #include <drivers/st/stm32_uart_regs.h>
18 #include <lib/mmio.h>
19 #include <tools_share/firmware_image_package.h>
20 
21 #include <platform_def.h>
22 #include <stm32cubeprogrammer.h>
23 
24 /* USART bootloader protocol version V4.0 */
25 #define USART_BL_VERSION	0x40U
26 
27 /* Command definition */
28 #define GET_CMD_COMMAND		0x00U
29 #define GET_VER_COMMAND		0x01U
30 #define GET_ID_COMMAND		0x02U
31 #define PHASE_COMMAND		0x03U
32 #define READ_PART_COMMAND	0x12U
33 #define START_COMMAND		0x21U
34 #define DOWNLOAD_COMMAND	0x31U
35 
36 /* Answer defines */
37 #define INIT_BYTE		0x7FU
38 #define ACK_BYTE		0x79U
39 #define NACK_BYTE		0x1FU
40 #define ABORT			0x5FU
41 
42 #define UNDEFINED_DOWN_ADDR	U(0xFFFFFFFF)
43 #define PROGRAMMER_TIMEOUT_US	20000U
44 
45 static const uint8_t command_tab[] = {
46 	GET_CMD_COMMAND,
47 	GET_VER_COMMAND,
48 	GET_ID_COMMAND,
49 	PHASE_COMMAND,
50 	START_COMMAND,
51 	DOWNLOAD_COMMAND
52 };
53 
54 /* STM32CubeProgrammer over UART handle */
55 struct stm32prog_uart_handle_s {
56 	struct stm32_uart_handle_s uart;
57 	uint32_t packet;
58 	uint8_t *addr;
59 	uint32_t len;
60 	uint8_t phase;
61 	/* Error msg buffer: max 255 in UART protocol, reduced in TF-A */
62 	uint8_t error[64];
63 } handle;
64 
65 /* Trace and handle unrecoverable UART protocol error */
66 #define STM32PROG_ERROR(...) \
67 	{ \
68 		ERROR(__VA_ARGS__); \
69 		if (handle.phase != PHASE_RESET) { \
70 			snprintf((char *)&handle.error, sizeof(handle.error), __VA_ARGS__); \
71 			handle.phase = PHASE_RESET; \
72 			handle.addr = (uint8_t *)UNDEFINED_DOWN_ADDR; \
73 			handle.len = 0U; \
74 			handle.packet = 0U; \
75 		} \
76 	}
77 
uart_write(const uint8_t * addr,uint16_t size)78 static int uart_write(const uint8_t *addr, uint16_t size)
79 {
80 	while (size != 0U) {
81 		if (stm32_uart_putc(&handle.uart, *addr) != 0) {
82 			return -EIO;
83 		}
84 		size--;
85 		addr++;
86 	}
87 
88 	return 0;
89 }
90 
uart_write_8(uint8_t byte)91 static int uart_write_8(uint8_t byte)
92 {
93 	return stm32_uart_putc(&handle.uart, byte);
94 }
95 
uart_write_32(uint32_t value)96 static int uart_write_32(uint32_t value)
97 {
98 	return uart_write((uint8_t *)&value, 4U);
99 }
100 
uart_read_8(uint8_t * byte)101 static int uart_read_8(uint8_t *byte)
102 {
103 	int ret;
104 	uint64_t timeout_ref = timeout_init_us(PROGRAMMER_TIMEOUT_US);
105 
106 	do {
107 		ret = stm32_uart_getc(&handle.uart);
108 		if (ret == -EAGAIN) {
109 			if (timeout_elapsed(timeout_ref)) {
110 				return -ETIMEDOUT;
111 			}
112 		} else if (ret < 0) {
113 			return ret;
114 		}
115 	} while (ret == -EAGAIN);
116 
117 	*byte = (uint8_t)ret;
118 
119 	return 0;
120 }
121 
uart_send_result(uint8_t byte)122 static int uart_send_result(uint8_t byte)
123 {
124 	int ret;
125 
126 	/* Always flush fifo before to send result = read all pending data */
127 	do {
128 		ret = stm32_uart_getc(&handle.uart);
129 	} while (ret >= 0);
130 
131 	return uart_write_8(byte);
132 }
133 
is_valid_header(fip_toc_header_t * header)134 static bool is_valid_header(fip_toc_header_t *header)
135 {
136 	return (header->name == TOC_HEADER_NAME) &&
137 	       (header->serial_number != 0U);
138 }
139 
uart_receive_command(uint8_t * command)140 static int uart_receive_command(uint8_t *command)
141 {
142 	uint8_t byte = 0U;
143 	uint8_t xor = 0U;
144 	unsigned int count;
145 	bool found = false;
146 	int ret;
147 
148 	/* Repeat read until something is received */
149 	do {
150 		stm32_iwdg_refresh();
151 		ret = uart_read_8(&byte);
152 	} while (ret == -ETIMEDOUT);
153 
154 	if (ret != 0) {
155 		return ret;
156 	}
157 
158 	/* Handle reconnection request */
159 	if (byte == INIT_BYTE) {
160 		*command = byte;
161 		return 0;
162 	}
163 
164 	for (count = 0U; count < ARRAY_SIZE(command_tab); count++) {
165 		if (command_tab[count] == byte) {
166 			found = true;
167 			break;
168 		}
169 	}
170 	if (!found) {
171 		VERBOSE("UART: Command unknown (byte=0x%x)\n", byte);
172 		return -EPROTO;
173 	}
174 
175 	ret = uart_read_8(&xor);
176 	if (ret != 0) {
177 		return ret;
178 	}
179 	if ((byte ^ xor) != 0xFF) {
180 		VERBOSE("UART: Command XOR check fail (byte=0x%x, xor=0x%x)\n",
181 			byte, xor);
182 		return -EPROTO;
183 	}
184 
185 	*command = byte;
186 
187 	return 0;
188 }
189 
get_cmd_command(void)190 static int get_cmd_command(void)
191 {
192 	const uint8_t msg[2] = {
193 		sizeof(command_tab), /* Length of data - 1 */
194 		USART_BL_VERSION
195 	};
196 	int ret;
197 
198 	ret = uart_write(msg, sizeof(msg));
199 	if (ret != 0) {
200 		return ret;
201 	}
202 
203 	return uart_write(command_tab, sizeof(command_tab));
204 }
205 
get_version_command(void)206 static int get_version_command(void)
207 {
208 	return uart_write_8(STM32_TF_VERSION);
209 }
210 
get_id_command(void)211 static int get_id_command(void)
212 {
213 	uint8_t msg[3] = {
214 		sizeof(msg) - 1 /* Length of data - 1 */
215 	};
216 	uint32_t chip_id = stm32mp_get_chip_dev_id();
217 
218 	be16enc(&msg[1], chip_id);
219 
220 	return uart_write(msg, sizeof(msg));
221 }
222 
uart_send_phase(uint32_t address)223 static int uart_send_phase(uint32_t address)
224 {
225 	int ret;
226 	uint8_t msg_size = 5U; /* Length of data - 1 */
227 	uint8_t error_size = 0U;
228 
229 	/* Additional information only for RESET phase */
230 	if (handle.phase == PHASE_RESET) {
231 		error_size = strnlen((char *)&handle.error, sizeof(handle.error));
232 	}
233 	ret = uart_write_8(msg_size + error_size);
234 	if (ret != 0) {
235 		return ret;
236 	}
237 
238 	/* Send the ID of next partition */
239 	ret = uart_write_8(handle.phase);
240 	if (ret != 0) {
241 		return ret;
242 	}
243 
244 	/* Destination address */
245 	ret = uart_write_32(address);
246 	if (ret != 0) {
247 		return ret;
248 	}
249 
250 	ret = uart_write_8(error_size);
251 	if (ret != 0) {
252 		return ret;
253 	}
254 
255 	/* Additional information: message error */
256 	if (error_size > 0U) {
257 		ret = uart_write(handle.error, error_size);
258 	}
259 
260 	return ret;
261 }
262 
uart_download_part(void)263 static int uart_download_part(void)
264 {
265 	uint8_t operation = 0U;
266 	uint8_t xor;
267 	uint8_t byte = 0U;
268 	uint32_t packet_number = 0U;
269 	uint32_t packet_size = 0U;
270 	uint32_t i = 0U;
271 	int ret;
272 
273 	/* Get operation number */
274 	ret = uart_read_8(&operation);
275 	if (ret != 0) {
276 		return ret;
277 	}
278 
279 	xor = operation;
280 
281 	/* Get packet number */
282 	for (i = 3U; i != 0U; i--) {
283 		ret = uart_read_8(&byte);
284 		if (ret != 0) {
285 			return ret;
286 		}
287 
288 		xor ^= byte;
289 		packet_number = (packet_number << 8) | byte;
290 	}
291 
292 	if (packet_number != handle.packet) {
293 		WARN("UART: Bad packet number receive: %u, expected %u\n",
294 		     packet_number, handle.packet);
295 		return -EPROTO;
296 	}
297 
298 	/* Checksum */
299 	ret = uart_read_8(&byte);
300 	if (ret != 0) {
301 		return ret;
302 	}
303 	if (xor != byte) {
304 		VERBOSE("UART: Download Command checksum xor: %x, received %x\n",
305 			xor, byte);
306 		return -EPROTO;
307 	}
308 
309 	ret = uart_send_result(ACK_BYTE);
310 	if (ret != 0) {
311 		return ret;
312 	}
313 
314 	ret = uart_read_8(&byte);
315 	if (ret != 0) {
316 		return ret;
317 	}
318 	xor = byte;
319 	packet_size = byte + 1U;
320 	if (handle.len < packet_size) {
321 		STM32PROG_ERROR("Download overflow at %p\n", handle.addr + packet_size);
322 		return 0;
323 	}
324 
325 	for (i = 0U; i < packet_size; i++) {
326 		ret = uart_read_8(&byte);
327 		if (ret != 0) {
328 			return ret;
329 		}
330 
331 		*(handle.addr + i) = byte;
332 		xor ^= byte;
333 	}
334 
335 	/* Checksum */
336 	ret = uart_read_8(&byte) != 0;
337 	if (ret != 0) {
338 		return ret;
339 	}
340 	if (xor != byte) {
341 		VERBOSE("UART: Download Data checksum xor: %x, received %x\n",
342 			xor, byte);
343 		return -EPROTO;
344 	}
345 
346 	/* Packet treated */
347 	handle.packet++;
348 	handle.addr += packet_size;
349 	handle.len -= packet_size;
350 
351 	return 0;
352 }
353 
uart_start_cmd(uintptr_t buffer)354 static int uart_start_cmd(uintptr_t buffer)
355 {
356 	uint8_t byte = 0U;
357 	uint8_t xor = 0U;
358 	uint32_t i;
359 	uint32_t start_address = 0U;
360 	int ret;
361 
362 	/* Get address */
363 	for (i = 4U; i != 0U; i--) {
364 		ret = uart_read_8(&byte);
365 		if (ret != 0U) {
366 			return ret;
367 		}
368 
369 		xor ^= byte;
370 		start_address = (start_address << 8) | byte;
371 	}
372 
373 	/* Checksum */
374 	ret = uart_read_8(&byte);
375 	if (ret != 0) {
376 		return ret;
377 	}
378 
379 	if (xor != byte) {
380 		VERBOSE("UART: Start Command checksum xor: %x, received %x\n",
381 			xor, byte);
382 		return -EPROTO;
383 	}
384 
385 	if (start_address != UNDEFINED_DOWN_ADDR) {
386 		STM32PROG_ERROR("Invalid start at %x, for phase %u\n",
387 				start_address, handle.phase);
388 		return 0;
389 	}
390 
391 	if (!is_valid_header((fip_toc_header_t *)buffer)) {
392 		STM32PROG_ERROR("FIP Header check failed %lx, for phase %u\n",
393 				buffer, handle.phase);
394 		return -EIO;
395 	}
396 	VERBOSE("FIP header looks OK.\n");
397 
398 	return 0;
399 }
400 
uart_read(uint8_t id,uintptr_t buffer,size_t length)401 static int uart_read(uint8_t id, uintptr_t buffer, size_t length)
402 {
403 	bool start_done = false;
404 	int ret;
405 	uint8_t command = 0U;
406 
407 	handle.phase = id;
408 	handle.packet = 0U;
409 	handle.addr = (uint8_t *)buffer;
410 	handle.len = length;
411 
412 	INFO("UART: read phase %u at 0x%lx size 0x%x\n",
413 	     id, buffer, length);
414 	while (!start_done) {
415 		ret = uart_receive_command(&command);
416 		if (ret != 0) {
417 			/* Delay to wait STM32CubeProgrammer end of transmission */
418 			mdelay(3);
419 
420 			ret = uart_send_result(NACK_BYTE);
421 			if (ret != 0U) {
422 				return ret;
423 			}
424 
425 			continue;
426 		}
427 
428 		uart_send_result(ACK_BYTE);
429 
430 		switch (command) {
431 		case INIT_BYTE:
432 			INFO("UART: Connected\n");
433 			/* Nothing to do */
434 			continue;
435 
436 		case GET_CMD_COMMAND:
437 			ret = get_cmd_command();
438 			break;
439 
440 		case GET_VER_COMMAND:
441 			ret = get_version_command();
442 			break;
443 
444 		case GET_ID_COMMAND:
445 			ret = get_id_command();
446 			break;
447 
448 		case PHASE_COMMAND:
449 			ret = uart_send_phase((uint32_t)buffer);
450 			if ((ret == 0) && (handle.phase == PHASE_RESET)) {
451 				start_done = true;
452 				INFO("UART: Reset\n");
453 			}
454 			break;
455 
456 		case DOWNLOAD_COMMAND:
457 			ret = uart_download_part();
458 			break;
459 
460 		case START_COMMAND:
461 			ret = uart_start_cmd(buffer);
462 			if ((ret == 0) && (handle.phase == id)) {
463 				INFO("UART: Start phase %u\n", handle.phase);
464 				start_done = true;
465 			}
466 			break;
467 
468 		default:
469 			WARN("UART: Unknown command\n");
470 			ret = -EINVAL;
471 			break;
472 		}
473 
474 		if (ret == 0) {
475 			ret = uart_send_result(ACK_BYTE);
476 		} else {
477 			ret = uart_send_result(NACK_BYTE);
478 		}
479 		if (ret != 0) {
480 			return ret;
481 		}
482 	}
483 
484 	return 0;
485 }
486 
487 /* Init UART: 115200, 8bit 1stop parity even and enable FIFO mode */
488 const struct stm32_uart_init_s init = {
489 	.baud_rate = STM32MP_UART_BAUDRATE,
490 	.word_length = STM32_UART_WORDLENGTH_9B,
491 	.stop_bits = STM32_UART_STOPBITS_1,
492 	.parity = STM32_UART_PARITY_EVEN,
493 	.hw_flow_control = STM32_UART_HWCONTROL_NONE,
494 	.mode = STM32_UART_MODE_TX_RX,
495 	.fifo_mode = STM32_UART_FIFOMODE_EN,
496 };
497 
stm32cubeprog_uart_load(uintptr_t instance,uintptr_t base,size_t len)498 int stm32cubeprog_uart_load(uintptr_t instance, uintptr_t base, size_t len)
499 {
500 	int ret;
501 
502 	if (stm32_uart_init(&handle.uart, instance, &init) != 0) {
503 		return -EIO;
504 	}
505 
506 	/*
507 	 * The following NACK_BYTE is written because STM32CubeProgrammer has
508 	 * already sent its command before TF-A has reached this point, and
509 	 * because FIFO was not configured by BootROM.
510 	 * The byte in the UART_RX register is then the checksum and not the
511 	 * command. NACK_BYTE has to be written, so that the programmer will
512 	 * re-send the good command.
513 	 */
514 	ret = uart_send_result(NACK_BYTE);
515 	if (ret != 0) {
516 		return ret;
517 	}
518 
519 	return uart_read(PHASE_SSBL, base, len);
520 }
521