1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
4 */
5
6 #include <command.h>
7 #include <console.h>
8 #include <dfu.h>
9 #include <malloc.h>
10 #include <misc.h>
11 #include <mmc.h>
12 #include <part.h>
13 #include <asm/arch/stm32mp1_smc.h>
14 #include <asm/global_data.h>
15 #include <dm/uclass.h>
16 #include <jffs2/load_kernel.h>
17 #include <linux/list.h>
18 #include <linux/list_sort.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/sizes.h>
21
22 #include "stm32prog.h"
23
24 /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
25 #define GPT_HEADER_SZ 34
26
27 #define OPT_SELECT BIT(0)
28 #define OPT_EMPTY BIT(1)
29 #define OPT_DELETE BIT(2)
30
31 #define IS_SELECT(part) ((part)->option & OPT_SELECT)
32 #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
33 #define IS_DELETE(part) ((part)->option & OPT_DELETE)
34
35 #define ALT_BUF_LEN SZ_1K
36
37 #define ROOTFS_MMC0_UUID \
38 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
39 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
40
41 #define ROOTFS_MMC1_UUID \
42 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
43 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
44
45 #define ROOTFS_MMC2_UUID \
46 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
47 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
48
49 /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
50 #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
51
52 /*
53 * unique partition guid (uuid) for partition named "rootfs"
54 * on each MMC instance = SD Card or eMMC
55 * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
56 */
57 static const efi_guid_t uuid_mmc[3] = {
58 ROOTFS_MMC0_UUID,
59 ROOTFS_MMC1_UUID,
60 ROOTFS_MMC2_UUID
61 };
62
63 /* order of column in flash layout file */
64 enum stm32prog_col_t {
65 COL_OPTION,
66 COL_ID,
67 COL_NAME,
68 COL_TYPE,
69 COL_IP,
70 COL_OFFSET,
71 COL_NB_STM32
72 };
73
74 #define FIP_TOC_HEADER_NAME 0xAA640001
75
76 struct fip_toc_header {
77 u32 name;
78 u32 serial_number;
79 u64 flags;
80 };
81
82 DECLARE_GLOBAL_DATA_PTR;
83
84 /* partition handling routines : CONFIG_CMD_MTDPARTS */
85 int mtdparts_init(void);
86 int find_dev_and_part(const char *id, struct mtd_device **dev,
87 u8 *part_num, struct part_info **part);
88
stm32prog_get_error(struct stm32prog_data * data)89 char *stm32prog_get_error(struct stm32prog_data *data)
90 {
91 static const char error_msg[] = "Unspecified";
92
93 if (strlen(data->error) == 0)
94 strcpy(data->error, error_msg);
95
96 return data->error;
97 }
98
stm32prog_is_fip_header(struct fip_toc_header * header)99 static bool stm32prog_is_fip_header(struct fip_toc_header *header)
100 {
101 return (header->name == FIP_TOC_HEADER_NAME) && header->serial_number;
102 }
103
stm32prog_header_check(struct raw_header_s * raw_header,struct image_header_s * header)104 void stm32prog_header_check(struct raw_header_s *raw_header,
105 struct image_header_s *header)
106 {
107 unsigned int i;
108
109 if (!raw_header || !header) {
110 log_debug("%s:no header data\n", __func__);
111 return;
112 }
113
114 header->type = HEADER_NONE;
115 header->image_checksum = 0x0;
116 header->image_length = 0x0;
117
118 if (stm32prog_is_fip_header((struct fip_toc_header *)raw_header)) {
119 header->type = HEADER_FIP;
120 return;
121 }
122
123 if (raw_header->magic_number !=
124 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
125 log_debug("%s:invalid magic number : 0x%x\n",
126 __func__, raw_header->magic_number);
127 return;
128 }
129 /* only header v1.0 supported */
130 if (raw_header->header_version != 0x00010000) {
131 log_debug("%s:invalid header version : 0x%x\n",
132 __func__, raw_header->header_version);
133 return;
134 }
135 if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
136 log_debug("%s:invalid reserved field\n", __func__);
137 return;
138 }
139 for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
140 if (raw_header->padding[i] != 0) {
141 log_debug("%s:invalid padding field\n", __func__);
142 return;
143 }
144 }
145 header->type = HEADER_STM32IMAGE;
146 header->image_checksum = le32_to_cpu(raw_header->image_checksum);
147 header->image_length = le32_to_cpu(raw_header->image_length);
148
149 return;
150 }
151
stm32prog_header_checksum(u32 addr,struct image_header_s * header)152 static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
153 {
154 u32 i, checksum;
155 u8 *payload;
156
157 /* compute checksum on payload */
158 payload = (u8 *)addr;
159 checksum = 0;
160 for (i = header->image_length; i > 0; i--)
161 checksum += *(payload++);
162
163 return checksum;
164 }
165
166 /* FLASHLAYOUT PARSING *****************************************/
parse_option(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)167 static int parse_option(struct stm32prog_data *data,
168 int i, char *p, struct stm32prog_part_t *part)
169 {
170 int result = 0;
171 char *c = p;
172
173 part->option = 0;
174 if (!strcmp(p, "-"))
175 return 0;
176
177 while (*c) {
178 switch (*c) {
179 case 'P':
180 part->option |= OPT_SELECT;
181 break;
182 case 'E':
183 part->option |= OPT_EMPTY;
184 break;
185 case 'D':
186 part->option |= OPT_DELETE;
187 break;
188 default:
189 result = -EINVAL;
190 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
191 i, *c, p);
192 return -EINVAL;
193 }
194 c++;
195 }
196 if (!(part->option & OPT_SELECT)) {
197 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
198 return -EINVAL;
199 }
200
201 return result;
202 }
203
parse_id(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)204 static int parse_id(struct stm32prog_data *data,
205 int i, char *p, struct stm32prog_part_t *part)
206 {
207 int result = 0;
208 unsigned long value;
209
210 result = strict_strtoul(p, 0, &value);
211 part->id = value;
212 if (result || value > PHASE_LAST_USER) {
213 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
214 result = -EINVAL;
215 }
216
217 return result;
218 }
219
parse_name(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)220 static int parse_name(struct stm32prog_data *data,
221 int i, char *p, struct stm32prog_part_t *part)
222 {
223 int result = 0;
224
225 if (strlen(p) < sizeof(part->name)) {
226 strcpy(part->name, p);
227 } else {
228 stm32prog_err("Layout line %d: partition name too long [%d]: %s",
229 i, strlen(p), p);
230 result = -EINVAL;
231 }
232
233 return result;
234 }
235
parse_type(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)236 static int parse_type(struct stm32prog_data *data,
237 int i, char *p, struct stm32prog_part_t *part)
238 {
239 int result = 0;
240 int len = 0;
241
242 part->bin_nb = 0;
243 if (!strncmp(p, "Binary", 6)) {
244 part->part_type = PART_BINARY;
245
246 /* search for Binary(X) case */
247 len = strlen(p);
248 part->bin_nb = 1;
249 if (len > 6) {
250 if (len < 8 ||
251 (p[6] != '(') ||
252 (p[len - 1] != ')'))
253 result = -EINVAL;
254 else
255 part->bin_nb =
256 dectoul(&p[7], NULL);
257 }
258 } else if (!strcmp(p, "System")) {
259 part->part_type = PART_SYSTEM;
260 } else if (!strcmp(p, "FileSystem")) {
261 part->part_type = PART_FILESYSTEM;
262 } else if (!strcmp(p, "RawImage")) {
263 part->part_type = RAW_IMAGE;
264 } else {
265 result = -EINVAL;
266 }
267 if (result)
268 stm32prog_err("Layout line %d: type parsing error : '%s'",
269 i, p);
270
271 return result;
272 }
273
parse_ip(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)274 static int parse_ip(struct stm32prog_data *data,
275 int i, char *p, struct stm32prog_part_t *part)
276 {
277 int result = 0;
278 unsigned int len = 0;
279
280 part->dev_id = 0;
281 if (!strcmp(p, "none")) {
282 part->target = STM32PROG_NONE;
283 } else if (!strncmp(p, "mmc", 3)) {
284 part->target = STM32PROG_MMC;
285 len = 3;
286 } else if (!strncmp(p, "nor", 3)) {
287 part->target = STM32PROG_NOR;
288 len = 3;
289 } else if (!strncmp(p, "nand", 4)) {
290 part->target = STM32PROG_NAND;
291 len = 4;
292 } else if (!strncmp(p, "spi-nand", 8)) {
293 part->target = STM32PROG_SPI_NAND;
294 len = 8;
295 } else if (!strncmp(p, "ram", 3)) {
296 part->target = STM32PROG_RAM;
297 len = 0;
298 } else {
299 result = -EINVAL;
300 }
301 if (len) {
302 /* only one digit allowed for device id */
303 if (strlen(p) != len + 1) {
304 result = -EINVAL;
305 } else {
306 part->dev_id = p[len] - '0';
307 if (part->dev_id > 9)
308 result = -EINVAL;
309 }
310 }
311 if (result)
312 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
313
314 return result;
315 }
316
parse_offset(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)317 static int parse_offset(struct stm32prog_data *data,
318 int i, char *p, struct stm32prog_part_t *part)
319 {
320 int result = 0;
321 char *tail;
322
323 part->part_id = 0;
324 part->addr = 0;
325 part->size = 0;
326 /* eMMC boot parttion */
327 if (!strncmp(p, "boot", 4)) {
328 if (strlen(p) != 5) {
329 result = -EINVAL;
330 } else {
331 if (p[4] == '1')
332 part->part_id = -1;
333 else if (p[4] == '2')
334 part->part_id = -2;
335 else
336 result = -EINVAL;
337 }
338 if (result)
339 stm32prog_err("Layout line %d: invalid part '%s'",
340 i, p);
341 } else {
342 part->addr = simple_strtoull(p, &tail, 0);
343 if (tail == p || *tail != '\0') {
344 stm32prog_err("Layout line %d: invalid offset '%s'",
345 i, p);
346 result = -EINVAL;
347 }
348 }
349
350 return result;
351 }
352
353 static
354 int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
355 struct stm32prog_part_t *part) = {
356 [COL_OPTION] = parse_option,
357 [COL_ID] = parse_id,
358 [COL_NAME] = parse_name,
359 [COL_TYPE] = parse_type,
360 [COL_IP] = parse_ip,
361 [COL_OFFSET] = parse_offset,
362 };
363
parse_flash_layout(struct stm32prog_data * data,ulong addr,ulong size)364 static int parse_flash_layout(struct stm32prog_data *data,
365 ulong addr,
366 ulong size)
367 {
368 int column = 0, part_nb = 0, ret;
369 bool end_of_line, eof;
370 char *p, *start, *last, *col;
371 struct stm32prog_part_t *part;
372 struct image_header_s header;
373 int part_list_size;
374 int i;
375
376 data->part_nb = 0;
377
378 /* check if STM32image is detected */
379 stm32prog_header_check((struct raw_header_s *)addr, &header);
380 if (header.type == HEADER_STM32IMAGE) {
381 u32 checksum;
382
383 addr = addr + BL_HEADER_SIZE;
384 size = header.image_length;
385
386 checksum = stm32prog_header_checksum(addr, &header);
387 if (checksum != header.image_checksum) {
388 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
389 checksum, header.image_checksum);
390 return -EIO;
391 }
392 }
393 if (!size)
394 return -EINVAL;
395
396 start = (char *)addr;
397 last = start + size;
398
399 *last = 0x0; /* force null terminated string */
400 log_debug("flash layout =\n%s\n", start);
401
402 /* calculate expected number of partitions */
403 part_list_size = 1;
404 p = start;
405 while (*p && (p < last)) {
406 if (*p++ == '\n') {
407 part_list_size++;
408 if (p < last && *p == '#')
409 part_list_size--;
410 }
411 }
412 if (part_list_size > PHASE_LAST_USER) {
413 stm32prog_err("Layout: too many partition (%d)",
414 part_list_size);
415 return -1;
416 }
417 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
418 if (!part) {
419 stm32prog_err("Layout: alloc failed");
420 return -ENOMEM;
421 }
422 data->part_array = part;
423
424 /* main parsing loop */
425 i = 1;
426 eof = false;
427 p = start;
428 col = start; /* 1st column */
429 end_of_line = false;
430 while (!eof) {
431 switch (*p) {
432 /* CR is ignored and replaced by NULL character */
433 case '\r':
434 *p = '\0';
435 p++;
436 continue;
437 case '\0':
438 end_of_line = true;
439 eof = true;
440 break;
441 case '\n':
442 end_of_line = true;
443 break;
444 case '\t':
445 break;
446 case '#':
447 /* comment line is skipped */
448 if (column == 0 && p == col) {
449 while ((p < last) && *p)
450 if (*p++ == '\n')
451 break;
452 col = p;
453 i++;
454 if (p >= last || !*p) {
455 eof = true;
456 end_of_line = true;
457 }
458 continue;
459 }
460 /* fall through */
461 /* by default continue with the next character */
462 default:
463 p++;
464 continue;
465 }
466
467 /* replace by \0: allow string parsing for each column */
468 *p = '\0';
469 p++;
470 if (p >= last) {
471 eof = true;
472 end_of_line = true;
473 }
474
475 /* skip empty line and multiple TAB in tsv file */
476 if (strlen(col) == 0) {
477 col = p;
478 /* skip empty line */
479 if (column == 0 && end_of_line) {
480 end_of_line = false;
481 i++;
482 }
483 continue;
484 }
485
486 if (column < COL_NB_STM32) {
487 ret = parse[column](data, i, col, part);
488 if (ret)
489 return ret;
490 }
491
492 /* save the beginning of the next column */
493 column++;
494 col = p;
495
496 if (!end_of_line)
497 continue;
498
499 /* end of the line detected */
500 end_of_line = false;
501
502 if (column < COL_NB_STM32) {
503 stm32prog_err("Layout line %d: no enought column", i);
504 return -EINVAL;
505 }
506 column = 0;
507 part_nb++;
508 part++;
509 i++;
510 if (part_nb >= part_list_size) {
511 part = NULL;
512 if (!eof) {
513 stm32prog_err("Layout: no enought memory for %d part",
514 part_nb);
515 return -EINVAL;
516 }
517 }
518 }
519 data->part_nb = part_nb;
520 if (data->part_nb == 0) {
521 stm32prog_err("Layout: no partition found");
522 return -ENODEV;
523 }
524
525 return 0;
526 }
527
part_cmp(void * priv,struct list_head * a,struct list_head * b)528 static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
529 {
530 struct stm32prog_part_t *parta, *partb;
531
532 parta = container_of(a, struct stm32prog_part_t, list);
533 partb = container_of(b, struct stm32prog_part_t, list);
534
535 if (parta->part_id != partb->part_id)
536 return parta->part_id - partb->part_id;
537 else
538 return parta->addr > partb->addr ? 1 : -1;
539 }
540
get_mtd_by_target(char * string,enum stm32prog_target target,int dev_id)541 static void get_mtd_by_target(char *string, enum stm32prog_target target,
542 int dev_id)
543 {
544 const char *dev_str;
545
546 switch (target) {
547 case STM32PROG_NOR:
548 dev_str = "nor";
549 break;
550 case STM32PROG_NAND:
551 dev_str = "nand";
552 break;
553 case STM32PROG_SPI_NAND:
554 dev_str = "spi-nand";
555 break;
556 default:
557 dev_str = "invalid";
558 break;
559 }
560 sprintf(string, "%s%d", dev_str, dev_id);
561 }
562
init_device(struct stm32prog_data * data,struct stm32prog_dev_t * dev)563 static int init_device(struct stm32prog_data *data,
564 struct stm32prog_dev_t *dev)
565 {
566 struct mmc *mmc = NULL;
567 struct blk_desc *block_dev = NULL;
568 struct mtd_info *mtd = NULL;
569 char mtd_id[16];
570 int part_id;
571 int ret;
572 u64 first_addr = 0, last_addr = 0;
573 struct stm32prog_part_t *part, *next_part;
574 u64 part_addr, part_size;
575 bool part_found;
576 const char *part_name;
577
578 switch (dev->target) {
579 case STM32PROG_MMC:
580 if (!IS_ENABLED(CONFIG_MMC)) {
581 stm32prog_err("unknown device type = %d", dev->target);
582 return -ENODEV;
583 }
584 mmc = find_mmc_device(dev->dev_id);
585 if (!mmc || mmc_init(mmc)) {
586 stm32prog_err("mmc device %d not found", dev->dev_id);
587 return -ENODEV;
588 }
589 block_dev = mmc_get_blk_desc(mmc);
590 if (!block_dev) {
591 stm32prog_err("mmc device %d not probed", dev->dev_id);
592 return -ENODEV;
593 }
594 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
595 dev->mmc = mmc;
596
597 /* reserve a full erase group for each GTP headers */
598 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
599 first_addr = dev->erase_size;
600 last_addr = (u64)(block_dev->lba -
601 mmc->erase_grp_size) *
602 block_dev->blksz;
603 } else {
604 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
605 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
606 block_dev->blksz;
607 }
608 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
609 block_dev->lba, block_dev->blksz);
610 log_debug(" available address = 0x%llx..0x%llx\n",
611 first_addr, last_addr);
612 log_debug(" full_update = %d\n", dev->full_update);
613 break;
614 case STM32PROG_NOR:
615 case STM32PROG_NAND:
616 case STM32PROG_SPI_NAND:
617 if (!IS_ENABLED(CONFIG_MTD)) {
618 stm32prog_err("unknown device type = %d", dev->target);
619 return -ENODEV;
620 }
621 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
622 log_debug("%s\n", mtd_id);
623
624 mtdparts_init();
625 mtd = get_mtd_device_nm(mtd_id);
626 if (IS_ERR(mtd)) {
627 stm32prog_err("MTD device %s not found", mtd_id);
628 return -ENODEV;
629 }
630 first_addr = 0;
631 last_addr = mtd->size;
632 dev->erase_size = mtd->erasesize;
633 log_debug("MTD device %s: size=%lld erasesize=%d\n",
634 mtd_id, mtd->size, mtd->erasesize);
635 log_debug(" available address = 0x%llx..0x%llx\n",
636 first_addr, last_addr);
637 dev->mtd = mtd;
638 break;
639 case STM32PROG_RAM:
640 first_addr = gd->bd->bi_dram[0].start;
641 last_addr = first_addr + gd->bd->bi_dram[0].size;
642 dev->erase_size = 1;
643 break;
644 default:
645 stm32prog_err("unknown device type = %d", dev->target);
646 return -ENODEV;
647 }
648 log_debug(" erase size = 0x%x\n", dev->erase_size);
649 log_debug(" full_update = %d\n", dev->full_update);
650
651 /* order partition list in offset order */
652 list_sort(NULL, &dev->part_list, &part_cmp);
653 part_id = 1;
654 log_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
655 list_for_each_entry(part, &dev->part_list, list) {
656 if (part->bin_nb > 1) {
657 if ((dev->target != STM32PROG_NAND &&
658 dev->target != STM32PROG_SPI_NAND) ||
659 part->id >= PHASE_FIRST_USER ||
660 strncmp(part->name, "fsbl", 4)) {
661 stm32prog_err("%s (0x%x): multiple binary %d not supported",
662 part->name, part->id,
663 part->bin_nb);
664 return -EINVAL;
665 }
666 }
667 if (part->part_type == RAW_IMAGE) {
668 part->part_id = 0x0;
669 part->addr = 0x0;
670 if (block_dev)
671 part->size = block_dev->lba * block_dev->blksz;
672 else
673 part->size = last_addr;
674 log_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
675 part->option, part->id, part->name,
676 part->part_type, part->bin_nb, part->target,
677 part->dev_id, part->addr, part->size);
678 continue;
679 }
680 if (part->part_id < 0) { /* boot hw partition for eMMC */
681 if (mmc) {
682 part->size = mmc->capacity_boot;
683 } else {
684 stm32prog_err("%s (0x%x): hw partition not expected : %d",
685 part->name, part->id,
686 part->part_id);
687 return -ENODEV;
688 }
689 } else {
690 part->part_id = part_id++;
691
692 /* last partition : size to the end of the device */
693 if (part->list.next != &dev->part_list) {
694 next_part =
695 container_of(part->list.next,
696 struct stm32prog_part_t,
697 list);
698 if (part->addr < next_part->addr) {
699 part->size = next_part->addr -
700 part->addr;
701 } else {
702 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
703 part->name, part->id,
704 part->addr,
705 next_part->name,
706 next_part->id,
707 next_part->addr);
708 return -EINVAL;
709 }
710 } else {
711 if (part->addr <= last_addr) {
712 part->size = last_addr - part->addr;
713 } else {
714 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
715 part->name, part->id,
716 part->addr, last_addr);
717 return -EINVAL;
718 }
719 }
720 if (part->addr < first_addr) {
721 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
722 part->name, part->id,
723 part->addr, first_addr);
724 return -EINVAL;
725 }
726 }
727 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
728 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
729 part->name, part->id, part->addr,
730 part->dev->erase_size);
731 return -EINVAL;
732 }
733 log_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
734 part->part_id, part->option, part->id, part->name,
735 part->part_type, part->bin_nb, part->target,
736 part->dev_id, part->addr, part->size);
737
738 part_addr = 0;
739 part_size = 0;
740 part_found = false;
741
742 /* check coherency with existing partition */
743 if (block_dev) {
744 /*
745 * block devices with GPT: check user partition size
746 * only for partial update, the GPT partions are be
747 * created for full update
748 */
749 if (dev->full_update || part->part_id < 0) {
750 log_debug("\n");
751 continue;
752 }
753 struct disk_partition partinfo;
754
755 ret = part_get_info(block_dev, part->part_id,
756 &partinfo);
757
758 if (ret) {
759 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
760 part->name, part->id,
761 part_id, part->dev_id);
762 return -ENODEV;
763 }
764 part_addr = (u64)partinfo.start * partinfo.blksz;
765 part_size = (u64)partinfo.size * partinfo.blksz;
766 part_name = (char *)partinfo.name;
767 part_found = true;
768 }
769
770 if (IS_ENABLED(CONFIG_MTD) && mtd) {
771 char mtd_part_id[32];
772 struct part_info *mtd_part;
773 struct mtd_device *mtd_dev;
774 u8 part_num;
775
776 sprintf(mtd_part_id, "%s,%d", mtd_id,
777 part->part_id - 1);
778 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
779 &part_num, &mtd_part);
780 if (ret != 0) {
781 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
782 part->name, part->id,
783 mtd_part_id);
784 return -ENODEV;
785 }
786 part_addr = mtd_part->offset;
787 part_size = mtd_part->size;
788 part_name = mtd_part->name;
789 part_found = true;
790 }
791
792 /* no partition for this device */
793 if (!part_found) {
794 log_debug("\n");
795 continue;
796 }
797
798 log_debug(" %08llx %08llx\n", part_addr, part_size);
799
800 if (part->addr != part_addr) {
801 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
802 part->name, part->id, part->part_id,
803 part_name, part->addr, part_addr);
804 return -ENODEV;
805 }
806 if (part->size != part_size) {
807 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
808 part->name, part->id, part->part_id,
809 part_name, part->addr, part->size,
810 part_size);
811 return -ENODEV;
812 }
813 }
814 return 0;
815 }
816
treat_partition_list(struct stm32prog_data * data)817 static int treat_partition_list(struct stm32prog_data *data)
818 {
819 int i, j;
820 struct stm32prog_part_t *part;
821
822 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
823 data->dev[j].target = STM32PROG_NONE;
824 INIT_LIST_HEAD(&data->dev[j].part_list);
825 }
826
827 #ifdef CONFIG_STM32MP15x_STM32IMAGE
828 data->tee_detected = false;
829 #endif
830 data->fsbl_nor_detected = false;
831 for (i = 0; i < data->part_nb; i++) {
832 part = &data->part_array[i];
833 part->alt_id = -1;
834
835 /* skip partition with IP="none" */
836 if (part->target == STM32PROG_NONE) {
837 if (IS_SELECT(part)) {
838 stm32prog_err("Layout: selected none phase = 0x%x",
839 part->id);
840 return -EINVAL;
841 }
842 continue;
843 }
844
845 if (part->id == PHASE_FLASHLAYOUT ||
846 part->id > PHASE_LAST_USER) {
847 stm32prog_err("Layout: invalid phase = 0x%x",
848 part->id);
849 return -EINVAL;
850 }
851 for (j = i + 1; j < data->part_nb; j++) {
852 if (part->id == data->part_array[j].id) {
853 stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
854 part->id, i, j);
855 return -EINVAL;
856 }
857 }
858 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
859 if (data->dev[j].target == STM32PROG_NONE) {
860 /* new device found */
861 data->dev[j].target = part->target;
862 data->dev[j].dev_id = part->dev_id;
863 data->dev[j].full_update = true;
864 data->dev_nb++;
865 break;
866 } else if ((part->target == data->dev[j].target) &&
867 (part->dev_id == data->dev[j].dev_id)) {
868 break;
869 }
870 }
871 if (j == STM32PROG_MAX_DEV) {
872 stm32prog_err("Layout: too many device");
873 return -EINVAL;
874 }
875 switch (part->target) {
876 case STM32PROG_NOR:
877 if (!data->fsbl_nor_detected &&
878 !strncmp(part->name, "fsbl", 4))
879 data->fsbl_nor_detected = true;
880 /* fallthrough */
881 case STM32PROG_NAND:
882 case STM32PROG_SPI_NAND:
883 #ifdef CONFIG_STM32MP15x_STM32IMAGE
884 if (!data->tee_detected &&
885 !strncmp(part->name, "tee", 3))
886 data->tee_detected = true;
887 break;
888 #endif
889 default:
890 break;
891 }
892 part->dev = &data->dev[j];
893 if (!IS_SELECT(part))
894 part->dev->full_update = false;
895 list_add_tail(&part->list, &data->dev[j].part_list);
896 }
897
898 return 0;
899 }
900
create_gpt_partitions(struct stm32prog_data * data)901 static int create_gpt_partitions(struct stm32prog_data *data)
902 {
903 int offset = 0;
904 const int buflen = SZ_8K;
905 char *buf;
906 char uuid[UUID_STR_LEN + 1];
907 unsigned char *uuid_bin;
908 unsigned int mmc_id;
909 int i;
910 bool rootfs_found;
911 struct stm32prog_part_t *part;
912
913 buf = malloc(buflen);
914 if (!buf)
915 return -ENOMEM;
916
917 puts("partitions : ");
918 /* initialize the selected device */
919 for (i = 0; i < data->dev_nb; i++) {
920 /* create gpt partition support only for full update on MMC */
921 if (data->dev[i].target != STM32PROG_MMC ||
922 !data->dev[i].full_update)
923 continue;
924
925 offset = 0;
926 rootfs_found = false;
927 memset(buf, 0, buflen);
928
929 list_for_each_entry(part, &data->dev[i].part_list, list) {
930 /* skip eMMC boot partitions */
931 if (part->part_id < 0)
932 continue;
933 /* skip Raw Image */
934 if (part->part_type == RAW_IMAGE)
935 continue;
936
937 if (offset + 100 > buflen) {
938 log_debug("\n%s: buffer too small, %s skippped",
939 __func__, part->name);
940 continue;
941 }
942
943 if (!offset)
944 offset += sprintf(buf, "gpt write mmc %d \"",
945 data->dev[i].dev_id);
946
947 offset += snprintf(buf + offset, buflen - offset,
948 "name=%s,start=0x%llx,size=0x%llx",
949 part->name,
950 part->addr,
951 part->size);
952
953 if (part->part_type == PART_BINARY)
954 offset += snprintf(buf + offset,
955 buflen - offset,
956 ",type="
957 LINUX_RESERVED_UUID);
958 else
959 offset += snprintf(buf + offset,
960 buflen - offset,
961 ",type=linux");
962
963 if (part->part_type == PART_SYSTEM)
964 offset += snprintf(buf + offset,
965 buflen - offset,
966 ",bootable");
967
968 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
969 mmc_id = part->dev_id;
970 rootfs_found = true;
971 if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
972 uuid_bin =
973 (unsigned char *)uuid_mmc[mmc_id].b;
974 uuid_bin_to_str(uuid_bin, uuid,
975 UUID_STR_FORMAT_GUID);
976 offset += snprintf(buf + offset,
977 buflen - offset,
978 ",uuid=%s", uuid);
979 }
980 }
981
982 offset += snprintf(buf + offset, buflen - offset, ";");
983 }
984
985 if (offset) {
986 offset += snprintf(buf + offset, buflen - offset, "\"");
987 log_debug("\ncmd: %s\n", buf);
988 if (run_command(buf, 0)) {
989 stm32prog_err("GPT partitionning fail: %s",
990 buf);
991 free(buf);
992
993 return -1;
994 }
995 }
996
997 if (data->dev[i].mmc)
998 part_init(mmc_get_blk_desc(data->dev[i].mmc));
999
1000 #ifdef DEBUG
1001 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
1002 log_debug("\ncmd: %s", buf);
1003 if (run_command(buf, 0))
1004 printf("fail !\n");
1005 else
1006 printf("OK\n");
1007
1008 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
1009 run_command(buf, 0);
1010 #endif
1011 }
1012 puts("done\n");
1013
1014 #ifdef DEBUG
1015 run_command("mtd list", 0);
1016 #endif
1017 free(buf);
1018
1019 return 0;
1020 }
1021
stm32prog_alt_add(struct stm32prog_data * data,struct dfu_entity * dfu,struct stm32prog_part_t * part)1022 static int stm32prog_alt_add(struct stm32prog_data *data,
1023 struct dfu_entity *dfu,
1024 struct stm32prog_part_t *part)
1025 {
1026 int ret = 0;
1027 int offset = 0;
1028 char devstr[10];
1029 char dfustr[10];
1030 char buf[ALT_BUF_LEN];
1031 u32 size;
1032 char multiplier, type;
1033
1034 /* max 3 digit for sector size */
1035 if (part->size > SZ_1M) {
1036 size = (u32)(part->size / SZ_1M);
1037 multiplier = 'M';
1038 } else if (part->size > SZ_1K) {
1039 size = (u32)(part->size / SZ_1K);
1040 multiplier = 'K';
1041 } else {
1042 size = (u32)part->size;
1043 multiplier = 'B';
1044 }
1045 if (IS_SELECT(part) && !IS_EMPTY(part))
1046 type = 'e'; /*Readable and Writeable*/
1047 else
1048 type = 'a';/*Readable*/
1049
1050 memset(buf, 0, sizeof(buf));
1051 offset = snprintf(buf, ALT_BUF_LEN - offset,
1052 "@%s/0x%02x/1*%d%c%c ",
1053 part->name, part->id,
1054 size, multiplier, type);
1055
1056 if (part->target == STM32PROG_RAM) {
1057 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1058 "ram 0x%llx 0x%llx",
1059 part->addr, part->size);
1060 } else if (part->part_type == RAW_IMAGE) {
1061 u64 dfu_size;
1062
1063 if (part->dev->target == STM32PROG_MMC)
1064 dfu_size = part->size / part->dev->mmc->read_bl_len;
1065 else
1066 dfu_size = part->size;
1067 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1068 "raw 0x0 0x%llx", dfu_size);
1069 } else if (part->part_id < 0) {
1070 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1071
1072 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1073 "raw 0x%llx 0x%llx",
1074 part->addr, nb_blk);
1075 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1076 " mmcpart %d;", -(part->part_id));
1077 } else {
1078 if (part->part_type == PART_SYSTEM &&
1079 (part->target == STM32PROG_NAND ||
1080 part->target == STM32PROG_NOR ||
1081 part->target == STM32PROG_SPI_NAND))
1082 offset += snprintf(buf + offset,
1083 ALT_BUF_LEN - offset,
1084 "partubi");
1085 else
1086 offset += snprintf(buf + offset,
1087 ALT_BUF_LEN - offset,
1088 "part");
1089 /* dev_id requested by DFU MMC */
1090 if (part->target == STM32PROG_MMC)
1091 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1092 " %d", part->dev_id);
1093 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1094 " %d;", part->part_id);
1095 }
1096 ret = -ENODEV;
1097 switch (part->target) {
1098 case STM32PROG_MMC:
1099 if (IS_ENABLED(CONFIG_MMC)) {
1100 ret = 0;
1101 sprintf(dfustr, "mmc");
1102 sprintf(devstr, "%d", part->dev_id);
1103 }
1104 break;
1105 case STM32PROG_NAND:
1106 case STM32PROG_NOR:
1107 case STM32PROG_SPI_NAND:
1108 if (IS_ENABLED(CONFIG_MTD)) {
1109 ret = 0;
1110 sprintf(dfustr, "mtd");
1111 get_mtd_by_target(devstr, part->target, part->dev_id);
1112 }
1113 break;
1114 case STM32PROG_RAM:
1115 ret = 0;
1116 sprintf(dfustr, "ram");
1117 sprintf(devstr, "0");
1118 break;
1119 default:
1120 break;
1121 }
1122 if (ret) {
1123 stm32prog_err("invalid target: %d", part->target);
1124 return ret;
1125 }
1126 log_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1127 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1128 log_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1129 dfustr, devstr, buf, ret);
1130
1131 return ret;
1132 }
1133
stm32prog_alt_add_virt(struct dfu_entity * dfu,char * name,int phase,int size)1134 static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1135 char *name, int phase, int size)
1136 {
1137 int ret = 0;
1138 char devstr[4];
1139 char buf[ALT_BUF_LEN];
1140
1141 sprintf(devstr, "%d", phase);
1142 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1143 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1144 log_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1145
1146 return ret;
1147 }
1148
dfu_init_entities(struct stm32prog_data * data)1149 static int dfu_init_entities(struct stm32prog_data *data)
1150 {
1151 int ret = 0;
1152 int phase, i, alt_id;
1153 struct stm32prog_part_t *part;
1154 struct dfu_entity *dfu;
1155 int alt_nb;
1156
1157 alt_nb = 2; /* number of virtual = CMD, OTP*/
1158 if (CONFIG_IS_ENABLED(DM_PMIC))
1159 alt_nb++; /* PMIC NVMEM*/
1160
1161 if (data->part_nb == 0)
1162 alt_nb++; /* +1 for FlashLayout */
1163 else
1164 for (i = 0; i < data->part_nb; i++) {
1165 if (data->part_array[i].target != STM32PROG_NONE)
1166 alt_nb++;
1167 }
1168
1169 if (dfu_alt_init(alt_nb, &dfu))
1170 return -ENODEV;
1171
1172 puts("DFU alt info setting: ");
1173 if (data->part_nb) {
1174 alt_id = 0;
1175 for (phase = 1;
1176 (phase <= PHASE_LAST_USER) &&
1177 (alt_id < alt_nb) && !ret;
1178 phase++) {
1179 /* ordering alt setting by phase id */
1180 part = NULL;
1181 for (i = 0; i < data->part_nb; i++) {
1182 if (phase == data->part_array[i].id) {
1183 part = &data->part_array[i];
1184 break;
1185 }
1186 }
1187 if (!part)
1188 continue;
1189 if (part->target == STM32PROG_NONE)
1190 continue;
1191 part->alt_id = alt_id;
1192 alt_id++;
1193
1194 ret = stm32prog_alt_add(data, dfu, part);
1195 }
1196 } else {
1197 char buf[ALT_BUF_LEN];
1198
1199 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1200 PHASE_FLASHLAYOUT, STM32_DDR_BASE);
1201 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1202 log_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1203 }
1204
1205 if (!ret)
1206 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, CMD_SIZE);
1207
1208 if (!ret)
1209 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, OTP_SIZE);
1210
1211 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1212 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, PMIC_SIZE);
1213
1214 if (ret)
1215 stm32prog_err("dfu init failed: %d", ret);
1216 puts("done\n");
1217
1218 #ifdef DEBUG
1219 dfu_show_entities();
1220 #endif
1221 return ret;
1222 }
1223
stm32prog_otp_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1224 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1225 long *size)
1226 {
1227 log_debug("%s: %x %lx\n", __func__, offset, *size);
1228
1229 if (!data->otp_part) {
1230 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1231 if (!data->otp_part)
1232 return -ENOMEM;
1233 }
1234
1235 if (!offset)
1236 memset(data->otp_part, 0, OTP_SIZE);
1237
1238 if (offset + *size > OTP_SIZE)
1239 *size = OTP_SIZE - offset;
1240
1241 memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
1242
1243 return 0;
1244 }
1245
stm32prog_otp_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1246 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1247 long *size)
1248 {
1249 int result = 0;
1250
1251 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1252 stm32prog_err("OTP update not supported");
1253
1254 return -1;
1255 }
1256
1257 log_debug("%s: %x %lx\n", __func__, offset, *size);
1258 /* alway read for first packet */
1259 if (!offset) {
1260 if (!data->otp_part)
1261 data->otp_part =
1262 memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1263
1264 if (!data->otp_part) {
1265 result = -ENOMEM;
1266 goto end_otp_read;
1267 }
1268
1269 /* init struct with 0 */
1270 memset(data->otp_part, 0, OTP_SIZE);
1271
1272 /* call the service */
1273 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1274 (u32)data->otp_part, 0);
1275 if (result)
1276 goto end_otp_read;
1277 }
1278
1279 if (!data->otp_part) {
1280 result = -ENOMEM;
1281 goto end_otp_read;
1282 }
1283
1284 if (offset + *size > OTP_SIZE)
1285 *size = OTP_SIZE - offset;
1286 memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
1287
1288 end_otp_read:
1289 log_debug("%s: result %i\n", __func__, result);
1290
1291 return result;
1292 }
1293
stm32prog_otp_start(struct stm32prog_data * data)1294 int stm32prog_otp_start(struct stm32prog_data *data)
1295 {
1296 int result = 0;
1297 struct arm_smccc_res res;
1298
1299 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1300 stm32prog_err("OTP update not supported");
1301
1302 return -1;
1303 }
1304
1305 if (!data->otp_part) {
1306 stm32prog_err("start OTP without data");
1307 return -1;
1308 }
1309
1310 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1311 (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
1312
1313 if (!res.a0) {
1314 switch (res.a1) {
1315 case 0:
1316 result = 0;
1317 break;
1318 case 1:
1319 stm32prog_err("Provisioning");
1320 result = 0;
1321 break;
1322 default:
1323 log_err("%s: OTP incorrect value (err = %ld)\n",
1324 __func__, res.a1);
1325 result = -EINVAL;
1326 break;
1327 }
1328 } else {
1329 log_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1330 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1331 result = -EINVAL;
1332 }
1333
1334 free(data->otp_part);
1335 data->otp_part = NULL;
1336 log_debug("%s: result %i\n", __func__, result);
1337
1338 return result;
1339 }
1340
stm32prog_pmic_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1341 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1342 long *size)
1343 {
1344 log_debug("%s: %x %lx\n", __func__, offset, *size);
1345
1346 if (!offset)
1347 memset(data->pmic_part, 0, PMIC_SIZE);
1348
1349 if (offset + *size > PMIC_SIZE)
1350 *size = PMIC_SIZE - offset;
1351
1352 memcpy(&data->pmic_part[offset], buffer, *size);
1353
1354 return 0;
1355 }
1356
stm32prog_pmic_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1357 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1358 long *size)
1359 {
1360 int result = 0, ret;
1361 struct udevice *dev;
1362
1363 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1364 stm32prog_err("PMIC update not supported");
1365
1366 return -EOPNOTSUPP;
1367 }
1368
1369 log_debug("%s: %x %lx\n", __func__, offset, *size);
1370 ret = uclass_get_device_by_driver(UCLASS_MISC,
1371 DM_DRIVER_GET(stpmic1_nvm),
1372 &dev);
1373 if (ret)
1374 return ret;
1375
1376 /* alway request PMIC for first packet */
1377 if (!offset) {
1378 /* init struct with 0 */
1379 memset(data->pmic_part, 0, PMIC_SIZE);
1380
1381 ret = uclass_get_device_by_driver(UCLASS_MISC,
1382 DM_DRIVER_GET(stpmic1_nvm),
1383 &dev);
1384 if (ret)
1385 return ret;
1386
1387 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1388 if (ret < 0) {
1389 result = ret;
1390 goto end_pmic_read;
1391 }
1392 if (ret != PMIC_SIZE) {
1393 result = -EACCES;
1394 goto end_pmic_read;
1395 }
1396 }
1397
1398 if (offset + *size > PMIC_SIZE)
1399 *size = PMIC_SIZE - offset;
1400
1401 memcpy(buffer, &data->pmic_part[offset], *size);
1402
1403 end_pmic_read:
1404 log_debug("%s: result %i\n", __func__, result);
1405 return result;
1406 }
1407
stm32prog_pmic_start(struct stm32prog_data * data)1408 int stm32prog_pmic_start(struct stm32prog_data *data)
1409 {
1410 int ret;
1411 struct udevice *dev;
1412
1413 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1414 stm32prog_err("PMIC update not supported");
1415
1416 return -EOPNOTSUPP;
1417 }
1418
1419 ret = uclass_get_device_by_driver(UCLASS_MISC,
1420 DM_DRIVER_GET(stpmic1_nvm),
1421 &dev);
1422 if (ret)
1423 return ret;
1424
1425 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1426 }
1427
1428 /* copy FSBL on NAND to improve reliability on NAND */
stm32prog_copy_fsbl(struct stm32prog_part_t * part)1429 static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1430 {
1431 int ret, i;
1432 void *fsbl;
1433 struct image_header_s header;
1434 struct raw_header_s raw_header;
1435 struct dfu_entity *dfu;
1436 long size, offset;
1437
1438 if (part->target != STM32PROG_NAND &&
1439 part->target != STM32PROG_SPI_NAND)
1440 return -EINVAL;
1441
1442 dfu = dfu_get_entity(part->alt_id);
1443
1444 /* read header */
1445 dfu_transaction_cleanup(dfu);
1446 size = BL_HEADER_SIZE;
1447 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1448 if (ret)
1449 return ret;
1450
1451 stm32prog_header_check(&raw_header, &header);
1452 if (header.type != HEADER_STM32IMAGE)
1453 return -ENOENT;
1454
1455 /* read header + payload */
1456 size = header.image_length + BL_HEADER_SIZE;
1457 size = round_up(size, part->dev->mtd->erasesize);
1458 fsbl = calloc(1, size);
1459 if (!fsbl)
1460 return -ENOMEM;
1461 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1462 log_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1463 if (ret)
1464 goto error;
1465
1466 dfu_transaction_cleanup(dfu);
1467 offset = 0;
1468 for (i = part->bin_nb - 1; i > 0; i--) {
1469 offset += size;
1470 /* write to the next erase block */
1471 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1472 log_debug("%s copy at ofset=%lx size=%lx ret=%d",
1473 __func__, offset, size, ret);
1474 if (ret)
1475 goto error;
1476 }
1477
1478 error:
1479 free(fsbl);
1480 return ret;
1481 }
1482
stm32prog_end_phase(struct stm32prog_data * data,u64 offset)1483 static void stm32prog_end_phase(struct stm32prog_data *data, u64 offset)
1484 {
1485 if (data->phase == PHASE_FLASHLAYOUT) {
1486 if (parse_flash_layout(data, STM32_DDR_BASE, 0))
1487 stm32prog_err("Layout: invalid FlashLayout");
1488 return;
1489 }
1490
1491 if (!data->cur_part)
1492 return;
1493
1494 if (data->cur_part->target == STM32PROG_RAM) {
1495 if (data->cur_part->part_type == PART_SYSTEM)
1496 data->uimage = data->cur_part->addr;
1497 if (data->cur_part->part_type == PART_FILESYSTEM)
1498 data->dtb = data->cur_part->addr;
1499 if (data->cur_part->part_type == PART_BINARY) {
1500 data->initrd = data->cur_part->addr;
1501 data->initrd_size = offset;
1502 }
1503 }
1504
1505 if (CONFIG_IS_ENABLED(MMC) &&
1506 data->cur_part->part_id < 0) {
1507 char cmdbuf[60];
1508
1509 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1510 data->cur_part->dev_id, data->cur_part->dev_id,
1511 -(data->cur_part->part_id));
1512 if (run_command(cmdbuf, 0)) {
1513 stm32prog_err("commands '%s' failed", cmdbuf);
1514 return;
1515 }
1516 }
1517
1518 if (CONFIG_IS_ENABLED(MTD) &&
1519 data->cur_part->bin_nb > 1) {
1520 if (stm32prog_copy_fsbl(data->cur_part)) {
1521 stm32prog_err("%s (0x%x): copy of fsbl failed",
1522 data->cur_part->name, data->cur_part->id);
1523 return;
1524 }
1525 }
1526 }
1527
stm32prog_do_reset(struct stm32prog_data * data)1528 void stm32prog_do_reset(struct stm32prog_data *data)
1529 {
1530 if (data->phase == PHASE_RESET) {
1531 data->phase = PHASE_DO_RESET;
1532 puts("Reset requested\n");
1533 }
1534 }
1535
stm32prog_next_phase(struct stm32prog_data * data)1536 void stm32prog_next_phase(struct stm32prog_data *data)
1537 {
1538 int phase, i;
1539 struct stm32prog_part_t *part;
1540 bool found;
1541
1542 phase = data->phase;
1543 switch (phase) {
1544 case PHASE_RESET:
1545 case PHASE_END:
1546 case PHASE_DO_RESET:
1547 return;
1548 }
1549
1550 /* found next selected partition */
1551 data->dfu_seq = 0;
1552 data->cur_part = NULL;
1553 data->phase = PHASE_END;
1554 found = false;
1555 do {
1556 phase++;
1557 if (phase > PHASE_LAST_USER)
1558 break;
1559 for (i = 0; i < data->part_nb; i++) {
1560 part = &data->part_array[i];
1561 if (part->id == phase) {
1562 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1563 data->cur_part = part;
1564 data->phase = phase;
1565 found = true;
1566 }
1567 break;
1568 }
1569 }
1570 } while (!found);
1571
1572 if (data->phase == PHASE_END)
1573 puts("Phase=END\n");
1574 }
1575
part_delete(struct stm32prog_data * data,struct stm32prog_part_t * part)1576 static int part_delete(struct stm32prog_data *data,
1577 struct stm32prog_part_t *part)
1578 {
1579 int ret = 0;
1580 unsigned long blks, blks_offset, blks_size;
1581 struct blk_desc *block_dev = NULL;
1582 char cmdbuf[40];
1583 char devstr[10];
1584
1585 printf("Erasing %s ", part->name);
1586 switch (part->target) {
1587 case STM32PROG_MMC:
1588 if (!IS_ENABLED(CONFIG_MMC)) {
1589 ret = -1;
1590 stm32prog_err("%s (0x%x): erase invalid",
1591 part->name, part->id);
1592 break;
1593 }
1594 printf("on mmc %d: ", part->dev->dev_id);
1595 block_dev = mmc_get_blk_desc(part->dev->mmc);
1596 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1597 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1598 /* -1 or -2 : delete boot partition of MMC
1599 * need to switch to associated hwpart 1 or 2
1600 */
1601 if (part->part_id < 0)
1602 if (blk_select_hwpart_devnum(IF_TYPE_MMC,
1603 part->dev->dev_id,
1604 -part->part_id))
1605 return -1;
1606
1607 blks = blk_derase(block_dev, blks_offset, blks_size);
1608
1609 /* return to user partition */
1610 if (part->part_id < 0)
1611 blk_select_hwpart_devnum(IF_TYPE_MMC,
1612 part->dev->dev_id, 0);
1613 if (blks != blks_size) {
1614 ret = -1;
1615 stm32prog_err("%s (0x%x): MMC erase failed",
1616 part->name, part->id);
1617 }
1618 break;
1619 case STM32PROG_NOR:
1620 case STM32PROG_NAND:
1621 case STM32PROG_SPI_NAND:
1622 if (!IS_ENABLED(CONFIG_MTD)) {
1623 ret = -1;
1624 stm32prog_err("%s (0x%x): erase invalid",
1625 part->name, part->id);
1626 break;
1627 }
1628 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1629 printf("on %s: ", devstr);
1630 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1631 devstr, part->addr, part->size);
1632 if (run_command(cmdbuf, 0)) {
1633 ret = -1;
1634 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1635 part->name, part->id, cmdbuf);
1636 }
1637 break;
1638 case STM32PROG_RAM:
1639 printf("on ram: ");
1640 memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
1641 break;
1642 default:
1643 ret = -1;
1644 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1645 break;
1646 }
1647 if (!ret)
1648 printf("done\n");
1649
1650 return ret;
1651 }
1652
stm32prog_devices_init(struct stm32prog_data * data)1653 static void stm32prog_devices_init(struct stm32prog_data *data)
1654 {
1655 int i;
1656 int ret;
1657 struct stm32prog_part_t *part;
1658
1659 ret = treat_partition_list(data);
1660 if (ret)
1661 goto error;
1662
1663 /* initialize the selected device */
1664 for (i = 0; i < data->dev_nb; i++) {
1665 ret = init_device(data, &data->dev[i]);
1666 if (ret)
1667 goto error;
1668 }
1669
1670 /* delete RAW partition before create partition */
1671 for (i = 0; i < data->part_nb; i++) {
1672 part = &data->part_array[i];
1673
1674 if (part->part_type != RAW_IMAGE)
1675 continue;
1676
1677 if (!IS_SELECT(part) || !IS_DELETE(part))
1678 continue;
1679
1680 ret = part_delete(data, part);
1681 if (ret)
1682 goto error;
1683 }
1684
1685 if (IS_ENABLED(CONFIG_MMC)) {
1686 ret = create_gpt_partitions(data);
1687 if (ret)
1688 goto error;
1689 }
1690
1691 /* delete partition GPT or MTD */
1692 for (i = 0; i < data->part_nb; i++) {
1693 part = &data->part_array[i];
1694
1695 if (part->part_type == RAW_IMAGE)
1696 continue;
1697
1698 if (!IS_SELECT(part) || !IS_DELETE(part))
1699 continue;
1700
1701 ret = part_delete(data, part);
1702 if (ret)
1703 goto error;
1704 }
1705
1706 return;
1707
1708 error:
1709 data->part_nb = 0;
1710 }
1711
stm32prog_dfu_init(struct stm32prog_data * data)1712 int stm32prog_dfu_init(struct stm32prog_data *data)
1713 {
1714 /* init device if no error */
1715 if (data->part_nb)
1716 stm32prog_devices_init(data);
1717
1718 if (data->part_nb)
1719 stm32prog_next_phase(data);
1720
1721 /* prepare DFU for device read/write */
1722 dfu_free_entities();
1723 return dfu_init_entities(data);
1724 }
1725
stm32prog_init(struct stm32prog_data * data,ulong addr,ulong size)1726 int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
1727 {
1728 memset(data, 0x0, sizeof(*data));
1729 data->read_phase = PHASE_RESET;
1730 data->phase = PHASE_FLASHLAYOUT;
1731
1732 return parse_flash_layout(data, addr, size);
1733 }
1734
stm32prog_clean(struct stm32prog_data * data)1735 void stm32prog_clean(struct stm32prog_data *data)
1736 {
1737 /* clean */
1738 dfu_free_entities();
1739 free(data->part_array);
1740 free(data->otp_part);
1741 free(data->buffer);
1742 }
1743
1744 /* DFU callback: used after serial and direct DFU USB access */
dfu_flush_callback(struct dfu_entity * dfu)1745 void dfu_flush_callback(struct dfu_entity *dfu)
1746 {
1747 if (!stm32prog_data)
1748 return;
1749
1750 if (dfu->dev_type == DFU_DEV_VIRT) {
1751 if (dfu->data.virt.dev_num == PHASE_OTP)
1752 stm32prog_otp_start(stm32prog_data);
1753 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1754 stm32prog_pmic_start(stm32prog_data);
1755 return;
1756 }
1757
1758 if (dfu->dev_type == DFU_DEV_RAM) {
1759 if (dfu->alt == 0 &&
1760 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
1761 stm32prog_end_phase(stm32prog_data, dfu->offset);
1762 /* waiting DFU DETACH for reenumeration */
1763 }
1764 }
1765
1766 if (!stm32prog_data->cur_part)
1767 return;
1768
1769 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1770 stm32prog_end_phase(stm32prog_data, dfu->offset);
1771 stm32prog_next_phase(stm32prog_data);
1772 }
1773 }
1774
dfu_initiated_callback(struct dfu_entity * dfu)1775 void dfu_initiated_callback(struct dfu_entity *dfu)
1776 {
1777 if (!stm32prog_data)
1778 return;
1779
1780 if (!stm32prog_data->cur_part)
1781 return;
1782
1783 /* force the saved offset for the current partition */
1784 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1785 dfu->offset = stm32prog_data->offset;
1786 stm32prog_data->dfu_seq = 0;
1787 log_debug("dfu offset = 0x%llx\n", dfu->offset);
1788 }
1789 }
1790
dfu_error_callback(struct dfu_entity * dfu,const char * msg)1791 void dfu_error_callback(struct dfu_entity *dfu, const char *msg)
1792 {
1793 struct stm32prog_data *data = stm32prog_data;
1794
1795 if (!stm32prog_data)
1796 return;
1797
1798 if (!stm32prog_data->cur_part)
1799 return;
1800
1801 if (dfu->alt == stm32prog_data->cur_part->alt_id)
1802 stm32prog_err(msg);
1803 }
1804