1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Andy Fleming <afleming@gmail.com>
5 *
6 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9 #ifndef _PHY_H
10 #define _PHY_H
11
12 #include <log.h>
13 #include <phy_interface.h>
14 #include <dm/ofnode.h>
15 #include <dm/read.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/mii.h>
19 #include <linux/ethtool.h>
20 #include <linux/mdio.h>
21
22 struct udevice;
23
24 #define PHY_FIXED_ID 0xa5a55a5a
25 #define PHY_NCSI_ID 0xbeefcafe
26
27 /*
28 * There is no actual id for this.
29 * This is just a dummy id for gmii2rgmmi converter.
30 */
31 #define PHY_GMII2RGMII_ID 0x5a5a5a5a
32
33 #define PHY_MAX_ADDR 32
34
35 #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
36
37 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
38 SUPPORTED_TP | \
39 SUPPORTED_MII)
40
41 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
42 SUPPORTED_10baseT_Full)
43
44 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
45 SUPPORTED_100baseT_Full)
46
47 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
48 SUPPORTED_1000baseT_Full)
49
50 #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
51 PHY_100BT_FEATURES | \
52 PHY_DEFAULT_FEATURES)
53
54 #define PHY_100BT1_FEATURES (SUPPORTED_TP | \
55 SUPPORTED_MII | \
56 SUPPORTED_100baseT_Full)
57
58 #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
59 PHY_1000BT_FEATURES)
60
61 #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
62 SUPPORTED_10000baseT_Full)
63
64 #ifndef PHY_ANEG_TIMEOUT
65 #define PHY_ANEG_TIMEOUT 4000
66 #endif
67
68
69 struct phy_device;
70
71 #define MDIO_NAME_LEN 32
72
73 struct mii_dev {
74 struct list_head link;
75 char name[MDIO_NAME_LEN];
76 void *priv;
77 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
78 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
79 u16 val);
80 int (*reset)(struct mii_dev *bus);
81 struct phy_device *phymap[PHY_MAX_ADDR];
82 u32 phy_mask;
83 };
84
85 /* struct phy_driver: a structure which defines PHY behavior
86 *
87 * uid will contain a number which represents the PHY. During
88 * startup, the driver will poll the PHY to find out what its
89 * UID--as defined by registers 2 and 3--is. The 32-bit result
90 * gotten from the PHY will be masked to
91 * discard any bits which may change based on revision numbers
92 * unimportant to functionality
93 *
94 */
95 struct phy_driver {
96 char *name;
97 unsigned int uid;
98 unsigned int mask;
99 unsigned int mmds;
100
101 u32 features;
102
103 /* Called to do any driver startup necessities */
104 /* Will be called during phy_connect */
105 int (*probe)(struct phy_device *phydev);
106
107 /* Called to configure the PHY, and modify the controller
108 * based on the results. Should be called after phy_connect */
109 int (*config)(struct phy_device *phydev);
110
111 /* Called when starting up the controller */
112 int (*startup)(struct phy_device *phydev);
113
114 /* Called when bringing down the controller */
115 int (*shutdown)(struct phy_device *phydev);
116
117 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
118 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
119 u16 val);
120
121 /* Phy specific driver override for reading a MMD register */
122 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
123
124 /* Phy specific driver override for writing a MMD register */
125 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
126 u16 val);
127
128 struct list_head list;
129
130 /* driver private data */
131 ulong data;
132 };
133
134 struct phy_device {
135 /* Information about the PHY type */
136 /* And management functions */
137 struct mii_dev *bus;
138 struct phy_driver *drv;
139 void *priv;
140
141 #ifdef CONFIG_DM_ETH
142 struct udevice *dev;
143 ofnode node;
144 #else
145 struct eth_device *dev;
146 #endif
147
148 /* forced speed & duplex (no autoneg)
149 * partner speed & duplex & pause (autoneg)
150 */
151 int speed;
152 int duplex;
153
154 /* The most recently read link state */
155 int link;
156 int port;
157 phy_interface_t interface;
158
159 u32 advertising;
160 u32 supported;
161 u32 mmds;
162
163 int autoneg;
164 int addr;
165 int pause;
166 int asym_pause;
167 u32 phy_id;
168 bool is_c45;
169 u32 flags;
170 };
171
172 struct fixed_link {
173 int phy_id;
174 int duplex;
175 int link_speed;
176 int pause;
177 int asym_pause;
178 };
179
180 /**
181 * phy_read - Convenience function for reading a given PHY register
182 * @phydev: the phy_device struct
183 * @devad: The MMD to read from
184 * @regnum: register number to read
185 * @return: value for success or negative errno for failure
186 */
phy_read(struct phy_device * phydev,int devad,int regnum)187 static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
188 {
189 struct mii_dev *bus = phydev->bus;
190
191 if (!bus || !bus->read) {
192 debug("%s: No bus configured\n", __func__);
193 return -1;
194 }
195
196 return bus->read(bus, phydev->addr, devad, regnum);
197 }
198
199 /**
200 * phy_write - Convenience function for writing a given PHY register
201 * @phydev: the phy_device struct
202 * @devad: The MMD to read from
203 * @regnum: register number to write
204 * @val: value to write to @regnum
205 * @return: 0 for success or negative errno for failure
206 */
phy_write(struct phy_device * phydev,int devad,int regnum,u16 val)207 static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
208 u16 val)
209 {
210 struct mii_dev *bus = phydev->bus;
211
212 if (!bus || !bus->write) {
213 debug("%s: No bus configured\n", __func__);
214 return -1;
215 }
216
217 return bus->write(bus, phydev->addr, devad, regnum, val);
218 }
219
220 /**
221 * phy_mmd_start_indirect - Convenience function for writing MMD registers
222 * @phydev: the phy_device struct
223 * @devad: The MMD to read from
224 * @regnum: register number to write
225 * @return: None
226 */
phy_mmd_start_indirect(struct phy_device * phydev,int devad,int regnum)227 static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
228 int regnum)
229 {
230 /* Write the desired MMD Devad */
231 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
232
233 /* Write the desired MMD register address */
234 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
235
236 /* Select the Function : DATA with no post increment */
237 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
238 (devad | MII_MMD_CTRL_NOINCR));
239 }
240
241 /**
242 * phy_read_mmd - Convenience function for reading a register
243 * from an MMD on a given PHY.
244 * @phydev: The phy_device struct
245 * @devad: The MMD to read from
246 * @regnum: The register on the MMD to read
247 * @return: Value for success or negative errno for failure
248 */
phy_read_mmd(struct phy_device * phydev,int devad,int regnum)249 static inline int phy_read_mmd(struct phy_device *phydev, int devad,
250 int regnum)
251 {
252 struct phy_driver *drv = phydev->drv;
253
254 if (regnum > (u16)~0 || devad > 32)
255 return -EINVAL;
256
257 /* driver-specific access */
258 if (drv->read_mmd)
259 return drv->read_mmd(phydev, devad, regnum);
260
261 /* direct C45 / C22 access */
262 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
263 devad == MDIO_DEVAD_NONE || !devad)
264 return phy_read(phydev, devad, regnum);
265
266 /* indirect C22 access */
267 phy_mmd_start_indirect(phydev, devad, regnum);
268
269 /* Read the content of the MMD's selected register */
270 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
271 }
272
273 /**
274 * phy_write_mmd - Convenience function for writing a register
275 * on an MMD on a given PHY.
276 * @phydev: The phy_device struct
277 * @devad: The MMD to read from
278 * @regnum: The register on the MMD to read
279 * @val: value to write to @regnum
280 * @return: 0 for success or negative errno for failure
281 */
phy_write_mmd(struct phy_device * phydev,int devad,int regnum,u16 val)282 static inline int phy_write_mmd(struct phy_device *phydev, int devad,
283 int regnum, u16 val)
284 {
285 struct phy_driver *drv = phydev->drv;
286
287 if (regnum > (u16)~0 || devad > 32)
288 return -EINVAL;
289
290 /* driver-specific access */
291 if (drv->write_mmd)
292 return drv->write_mmd(phydev, devad, regnum, val);
293
294 /* direct C45 / C22 access */
295 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
296 devad == MDIO_DEVAD_NONE || !devad)
297 return phy_write(phydev, devad, regnum, val);
298
299 /* indirect C22 access */
300 phy_mmd_start_indirect(phydev, devad, regnum);
301
302 /* Write the data into MMD's selected register */
303 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
304 }
305
306 /**
307 * phy_set_bits_mmd - Convenience function for setting bits in a register
308 * on MMD
309 * @phydev: the phy_device struct
310 * @devad: the MMD containing register to modify
311 * @regnum: register number to modify
312 * @val: bits to set
313 * @return: 0 for success or negative errno for failure
314 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)315 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
316 u32 regnum, u16 val)
317 {
318 int value, ret;
319
320 value = phy_read_mmd(phydev, devad, regnum);
321 if (value < 0)
322 return value;
323
324 value |= val;
325
326 ret = phy_write_mmd(phydev, devad, regnum, value);
327 if (ret < 0)
328 return ret;
329
330 return 0;
331 }
332
333 /**
334 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
335 * on MMD
336 * @phydev: the phy_device struct
337 * @devad: the MMD containing register to modify
338 * @regnum: register number to modify
339 * @val: bits to clear
340 * @return: 0 for success or negative errno for failure
341 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)342 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
343 u32 regnum, u16 val)
344 {
345 int value, ret;
346
347 value = phy_read_mmd(phydev, devad, regnum);
348 if (value < 0)
349 return value;
350
351 value &= ~val;
352
353 ret = phy_write_mmd(phydev, devad, regnum, value);
354 if (ret < 0)
355 return ret;
356
357 return 0;
358 }
359
360 #ifdef CONFIG_PHYLIB_10G
361 extern struct phy_driver gen10g_driver;
362
363 /*
364 * List all 10G interfaces here, the assumption being that PHYs on these
365 * interfaces are C45
366 */
is_10g_interface(phy_interface_t interface)367 static inline int is_10g_interface(phy_interface_t interface)
368 {
369 return interface == PHY_INTERFACE_MODE_XGMII ||
370 interface == PHY_INTERFACE_MODE_USXGMII ||
371 interface == PHY_INTERFACE_MODE_10GBASER;
372 }
373
374 #endif
375
376 /**
377 * phy_init() - Initializes the PHY drivers
378 * This function registers all available PHY drivers
379 *
380 * @return: 0 if OK, -ve on error
381 */
382 int phy_init(void);
383
384 /**
385 * phy_reset() - Resets the specified PHY
386 * Issues a reset of the PHY and waits for it to complete
387 *
388 * @phydev: PHY to reset
389 * @return: 0 if OK, -ve on error
390 */
391 int phy_reset(struct phy_device *phydev);
392
393 /**
394 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
395 * The function checks the PHY addresses flagged in phy_mask and returns a
396 * phy_device pointer if it detects a PHY.
397 * This function should only be called if just one PHY is expected to be present
398 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
399 * it is undefined which of these PHYs is returned.
400 *
401 * @bus: MII/MDIO bus to scan
402 * @phy_mask: bitmap of PYH addresses to scan
403 * @interface: type of MAC-PHY interface
404 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
405 */
406 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
407 phy_interface_t interface);
408
409 #ifdef CONFIG_PHY_FIXED
410
411 /**
412 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
413 * @node: OF node for the container of the fixed-link node
414 *
415 * Description: Creates a struct phy_device based on a fixed-link of_node
416 * description. Can be used without phy_connect by drivers which do not expose
417 * a UCLASS_ETH udevice.
418 */
419 struct phy_device *fixed_phy_create(ofnode node);
420
421 #else
422
fixed_phy_create(ofnode node)423 static inline struct phy_device *fixed_phy_create(ofnode node)
424 {
425 return NULL;
426 }
427
428 #endif
429
430 #ifdef CONFIG_DM_ETH
431
432 /**
433 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
434 * @phydev: PHY device
435 * @dev: Ethernet device
436 */
437 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
438
439 /**
440 * phy_connect() - Creates a PHY device for the Ethernet interface
441 * Creates a PHY device for the PHY at the given address, if one doesn't exist
442 * already, and associates it with the Ethernet device.
443 * The function may be called with addr <= 0, in this case addr value is ignored
444 * and the bus is scanned to detect a PHY. Scanning should only be used if only
445 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
446 * which PHY is returned.
447 *
448 * @bus: MII/MDIO bus that hosts the PHY
449 * @addr: PHY address on MDIO bus
450 * @dev: Ethernet device to associate to the PHY
451 * @interface: type of MAC-PHY interface
452 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
453 */
454 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
455 struct udevice *dev,
456 phy_interface_t interface);
457
phy_get_ofnode(struct phy_device * phydev)458 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
459 {
460 if (ofnode_valid(phydev->node))
461 return phydev->node;
462 else
463 return dev_ofnode(phydev->dev);
464 }
465 #else
466
467 /**
468 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
469 * @phydev: PHY device
470 * @dev: Ethernet device
471 */
472 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
473
474 /**
475 * phy_connect() - Creates a PHY device for the Ethernet interface
476 * Creates a PHY device for the PHY at the given address, if one doesn't exist
477 * already, and associates it with the Ethernet device.
478 * The function may be called with addr <= 0, in this case addr value is ignored
479 * and the bus is scanned to detect a PHY. Scanning should only be used if only
480 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
481 * which PHY is returned.
482 *
483 * @bus: MII/MDIO bus that hosts the PHY
484 * @addr: PHY address on MDIO bus
485 * @dev: Ethernet device to associate to the PHY
486 * @interface: type of MAC-PHY interface
487 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
488 */
489 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
490 struct eth_device *dev,
491 phy_interface_t interface);
492
phy_get_ofnode(struct phy_device * phydev)493 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
494 {
495 return ofnode_null();
496 }
497 #endif
498 int phy_startup(struct phy_device *phydev);
499 int phy_config(struct phy_device *phydev);
500 int phy_shutdown(struct phy_device *phydev);
501 int phy_register(struct phy_driver *drv);
502 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
503 int genphy_config_aneg(struct phy_device *phydev);
504 int genphy_restart_aneg(struct phy_device *phydev);
505 int genphy_update_link(struct phy_device *phydev);
506 int genphy_parse_link(struct phy_device *phydev);
507 int genphy_config(struct phy_device *phydev);
508 int genphy_startup(struct phy_device *phydev);
509 int genphy_shutdown(struct phy_device *phydev);
510 int gen10g_config(struct phy_device *phydev);
511 int gen10g_startup(struct phy_device *phydev);
512 int gen10g_shutdown(struct phy_device *phydev);
513 int gen10g_discover_mmds(struct phy_device *phydev);
514
515 int phy_b53_init(void);
516 int phy_mv88e61xx_init(void);
517 int phy_aquantia_init(void);
518 int phy_atheros_init(void);
519 int phy_broadcom_init(void);
520 int phy_cortina_init(void);
521 int phy_cortina_access_init(void);
522 int phy_davicom_init(void);
523 int phy_et1011c_init(void);
524 int phy_lxt_init(void);
525 int phy_marvell_init(void);
526 int phy_micrel_ksz8xxx_init(void);
527 int phy_micrel_ksz90x1_init(void);
528 int phy_meson_gxl_init(void);
529 int phy_natsemi_init(void);
530 int phy_nxp_tja11xx_init(void);
531 int phy_realtek_init(void);
532 int phy_smsc_init(void);
533 int phy_teranetics_init(void);
534 int phy_ti_init(void);
535 int phy_vitesse_init(void);
536 int phy_xilinx_init(void);
537 int phy_mscc_init(void);
538 int phy_fixed_init(void);
539 int phy_ncsi_init(void);
540 int phy_xilinx_gmii2rgmii_init(void);
541
542 int board_phy_config(struct phy_device *phydev);
543 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
544
545 /**
546 * phy_get_interface_by_name() - Look up a PHY interface name
547 *
548 * @str: PHY interface name, e.g. "mii"
549 * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
550 */
551 int phy_get_interface_by_name(const char *str);
552
553 /**
554 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
555 * is RGMII (all variants)
556 * @phydev: the phy_device struct
557 * @return: true if MII bus is RGMII or false if it is not
558 */
phy_interface_is_rgmii(struct phy_device * phydev)559 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
560 {
561 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
562 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
563 }
564
565 /**
566 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
567 * is SGMII (all variants)
568 * @phydev: the phy_device struct
569 * @return: true if MII bus is SGMII or false if it is not
570 */
phy_interface_is_sgmii(struct phy_device * phydev)571 static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
572 {
573 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
574 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
575 }
576
577 /* PHY UIDs for various PHYs that are referenced in external code */
578 #define PHY_UID_CS4340 0x13e51002
579 #define PHY_UID_CS4223 0x03e57003
580 #define PHY_UID_TN2020 0x00a19410
581 #define PHY_UID_IN112525_S03 0x02107440
582
583 #endif
584