1 /*
2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 */
6
7 #pragma once
8
9 #include <config.h>
10 #include <plat_mode/machine/hardware.h>
11
12 #ifdef CONFIG_XAPIC
13 typedef enum _apic_reg_t {
14 APIC_ID = 0x020,
15 APIC_VERSION = 0x030,
16 APIC_TASK_PRIO = 0x080,
17 APIC_ARBITR_PRIO = 0x090,
18 APIC_PROC_PRIO = 0x0A0,
19 APIC_EOI = 0x0B0,
20 APIC_LOGICAL_DEST = 0x0D0,
21 APIC_DEST_FORMAT = 0x0E0,
22 APIC_SVR = 0x0F0,
23 APIC_ISR_BASE = 0x100,
24 APIC_TMR_BASE = 0x180,
25 APIC_IRR_BASE = 0x200,
26 APIC_ERR_STATUS = 0x280,
27 APIC_ICR1 = 0x300,
28 APIC_ICR2 = 0x310,
29 APIC_LVT_TIMER = 0x320,
30 APIC_LVT_THERMAL = 0x330,
31 APIC_LVT_PERF_CNTR = 0x340,
32 APIC_LVT_LINT0 = 0x350,
33 APIC_LVT_LINT1 = 0x360,
34 APIC_LVT_ERROR = 0x370,
35 APIC_TIMER_COUNT = 0x380,
36 APIC_TIMER_CURRENT = 0x390,
37 APIC_TIMER_DIVIDE = 0x3E0
38 } apic_reg_t;
39
40 #define XAPIC_LDR_SHIFT 24
41 #define XAPIC_DFR_FLAT 0xFFFFFFFF
42
apic_read_reg(apic_reg_t reg)43 static inline uint32_t apic_read_reg(apic_reg_t reg)
44 {
45 return *(volatile uint32_t *)(PPTR_APIC + reg);
46 }
47
apic_write_reg(apic_reg_t reg,uint32_t val)48 static inline void apic_write_reg(apic_reg_t reg, uint32_t val)
49 {
50 *(volatile uint32_t *)(PPTR_APIC + reg) = val;
51 }
52
apic_get_logical_id(void)53 static inline logical_id_t apic_get_logical_id(void)
54 {
55 return apic_read_reg(APIC_LOGICAL_DEST) >> XAPIC_LDR_SHIFT;
56 }
57
apic_get_cluster(logical_id_t logical_id)58 static inline word_t apic_get_cluster(logical_id_t logical_id)
59 {
60 return 0; /* always return 0 as 'init_xapic_ldr' uses flat cluster */
61 }
62
apic_write_icr(word_t high,word_t low)63 static inline void apic_write_icr(word_t high, word_t low)
64 {
65 apic_write_reg(APIC_ICR2, high);
66 apic_write_reg(APIC_ICR1, low);
67 }
68
69 #define IPI_ICR_BARRIER asm volatile("" ::: "memory")
70 #define IPI_MEM_BARRIER IPI_ICR_BARRIER
71 #endif /* CONFIG_XAPIC */
72
73