1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
10 */
11
12 #include <common.h>
13 #include <bloblist.h>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
16 #include <console.h>
17 #include <cpu.h>
18 #include <cpu_func.h>
19 #include <dm.h>
20 #include <env.h>
21 #include <env_internal.h>
22 #include <fdtdec.h>
23 #include <fs.h>
24 #include <hang.h>
25 #include <i2c.h>
26 #include <init.h>
27 #include <initcall.h>
28 #include <lcd.h>
29 #include <log.h>
30 #include <malloc.h>
31 #include <mapmem.h>
32 #include <os.h>
33 #include <post.h>
34 #include <relocate.h>
35 #include <serial.h>
36 #ifdef CONFIG_SPL
37 #include <spl.h>
38 #endif
39 #include <status_led.h>
40 #include <sysreset.h>
41 #include <timer.h>
42 #include <trace.h>
43 #include <video.h>
44 #include <watchdog.h>
45 #include <asm/cache.h>
46 #ifdef CONFIG_MACH_TYPE
47 #include <asm/mach-types.h>
48 #endif
49 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
50 #include <asm/mp.h>
51 #endif
52 #include <asm/global_data.h>
53 #include <asm/io.h>
54 #include <asm/sections.h>
55 #include <dm/root.h>
56 #include <linux/errno.h>
57
58 /*
59 * Pointer to initial global data area
60 *
61 * Here we initialize it if needed.
62 */
63 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
64 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
65 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
66 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
67 #else
68 DECLARE_GLOBAL_DATA_PTR;
69 #endif
70
71 /*
72 * TODO(sjg@chromium.org): IMO this code should be
73 * refactored to a single function, something like:
74 *
75 * void led_set_state(enum led_colour_t colour, int on);
76 */
77 /************************************************************************
78 * Coloured LED functionality
79 ************************************************************************
80 * May be supplied by boards if desired
81 */
coloured_LED_init(void)82 __weak void coloured_LED_init(void) {}
red_led_on(void)83 __weak void red_led_on(void) {}
red_led_off(void)84 __weak void red_led_off(void) {}
green_led_on(void)85 __weak void green_led_on(void) {}
green_led_off(void)86 __weak void green_led_off(void) {}
yellow_led_on(void)87 __weak void yellow_led_on(void) {}
yellow_led_off(void)88 __weak void yellow_led_off(void) {}
blue_led_on(void)89 __weak void blue_led_on(void) {}
blue_led_off(void)90 __weak void blue_led_off(void) {}
91
92 /*
93 * Why is gd allocated a register? Prior to reloc it might be better to
94 * just pass it around to each function in this file?
95 *
96 * After reloc one could argue that it is hardly used and doesn't need
97 * to be in a register. Or if it is it should perhaps hold pointers to all
98 * global data for all modules, so that post-reloc we can avoid the massive
99 * literal pool we get on ARM. Or perhaps just encourage each module to use
100 * a structure...
101 */
102
103 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
init_func_watchdog_init(void)104 static int init_func_watchdog_init(void)
105 {
106 # if defined(CONFIG_HW_WATCHDOG) && \
107 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
108 defined(CONFIG_SH) || \
109 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
110 defined(CONFIG_IMX_WATCHDOG))
111 hw_watchdog_init();
112 puts(" Watchdog enabled\n");
113 # endif
114 WATCHDOG_RESET();
115
116 return 0;
117 }
118
init_func_watchdog_reset(void)119 int init_func_watchdog_reset(void)
120 {
121 WATCHDOG_RESET();
122
123 return 0;
124 }
125 #endif /* CONFIG_WATCHDOG */
126
board_add_ram_info(int use_default)127 __weak void board_add_ram_info(int use_default)
128 {
129 /* please define platform specific board_add_ram_info() */
130 }
131
init_baud_rate(void)132 static int init_baud_rate(void)
133 {
134 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
135 return 0;
136 }
137
display_text_info(void)138 static int display_text_info(void)
139 {
140 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
141 ulong bss_start, bss_end, text_base;
142
143 bss_start = (ulong)&__bss_start;
144 bss_end = (ulong)&__bss_end;
145
146 #ifdef CONFIG_SYS_TEXT_BASE
147 text_base = CONFIG_SYS_TEXT_BASE;
148 #else
149 text_base = CONFIG_SYS_MONITOR_BASE;
150 #endif
151
152 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
153 text_base, bss_start, bss_end);
154 #endif
155
156 return 0;
157 }
158
159 #ifdef CONFIG_SYSRESET
print_resetinfo(void)160 static int print_resetinfo(void)
161 {
162 struct udevice *dev;
163 char status[256];
164 int ret;
165
166 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
167 if (ret) {
168 debug("%s: No sysreset device found (error: %d)\n",
169 __func__, ret);
170 /* Not all boards have sysreset drivers available during early
171 * boot, so don't fail if one can't be found.
172 */
173 return 0;
174 }
175
176 if (!sysreset_get_status(dev, status, sizeof(status)))
177 printf("%s", status);
178
179 return 0;
180 }
181 #endif
182
183 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
print_cpuinfo(void)184 static int print_cpuinfo(void)
185 {
186 struct udevice *dev;
187 char desc[512];
188 int ret;
189
190 dev = cpu_get_current_dev();
191 if (!dev) {
192 debug("%s: Could not get CPU device\n",
193 __func__);
194 return -ENODEV;
195 }
196
197 ret = cpu_get_desc(dev, desc, sizeof(desc));
198 if (ret) {
199 debug("%s: Could not get CPU description (err = %d)\n",
200 dev->name, ret);
201 return ret;
202 }
203
204 printf("CPU: %s\n", desc);
205
206 return 0;
207 }
208 #endif
209
announce_dram_init(void)210 static int announce_dram_init(void)
211 {
212 puts("DRAM: ");
213 return 0;
214 }
215
show_dram_config(void)216 static int show_dram_config(void)
217 {
218 unsigned long long size;
219 int i;
220
221 debug("\nRAM Configuration:\n");
222 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
223 size += gd->bd->bi_dram[i].size;
224 debug("Bank #%d: %llx ", i,
225 (unsigned long long)(gd->bd->bi_dram[i].start));
226 #ifdef DEBUG
227 print_size(gd->bd->bi_dram[i].size, "\n");
228 #endif
229 }
230 debug("\nDRAM: ");
231
232 print_size(size, "");
233 board_add_ram_info(0);
234 putc('\n');
235
236 return 0;
237 }
238
dram_init_banksize(void)239 __weak int dram_init_banksize(void)
240 {
241 gd->bd->bi_dram[0].start = gd->ram_base;
242 gd->bd->bi_dram[0].size = get_effective_memsize();
243
244 return 0;
245 }
246
247 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
init_func_i2c(void)248 static int init_func_i2c(void)
249 {
250 puts("I2C: ");
251 i2c_init_all();
252 puts("ready\n");
253 return 0;
254 }
255 #endif
256
257 #if defined(CONFIG_VID)
init_func_vid(void)258 __weak int init_func_vid(void)
259 {
260 return 0;
261 }
262 #endif
263
setup_mon_len(void)264 static int setup_mon_len(void)
265 {
266 #if defined(__ARM__) || defined(__MICROBLAZE__)
267 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
268 #elif defined(CONFIG_SANDBOX)
269 gd->mon_len = 0;
270 #elif defined(CONFIG_EFI_APP)
271 gd->mon_len = (ulong)&_end - (ulong)_init;
272 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
273 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
274 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
275 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
276 #elif defined(CONFIG_SYS_MONITOR_BASE)
277 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
278 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
279 #endif
280 return 0;
281 }
282
setup_spl_handoff(void)283 static int setup_spl_handoff(void)
284 {
285 #if CONFIG_IS_ENABLED(HANDOFF)
286 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
287 sizeof(struct spl_handoff));
288 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
289 #endif
290
291 return 0;
292 }
293
arch_cpu_init(void)294 __weak int arch_cpu_init(void)
295 {
296 return 0;
297 }
298
mach_cpu_init(void)299 __weak int mach_cpu_init(void)
300 {
301 return 0;
302 }
303
304 /* Get the top of usable RAM */
board_get_usable_ram_top(ulong total_size)305 __weak ulong board_get_usable_ram_top(ulong total_size)
306 {
307 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
308 /*
309 * Detect whether we have so much RAM that it goes past the end of our
310 * 32-bit address space. If so, clip the usable RAM so it doesn't.
311 */
312 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
313 /*
314 * Will wrap back to top of 32-bit space when reservations
315 * are made.
316 */
317 return 0;
318 #endif
319 return gd->ram_top;
320 }
321
setup_dest_addr(void)322 static int setup_dest_addr(void)
323 {
324 debug("Monitor len: %08lX\n", gd->mon_len);
325 /*
326 * Ram is setup, size stored in gd !!
327 */
328 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
329 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
330 /*
331 * Subtract specified amount of memory to hide so that it won't
332 * get "touched" at all by U-Boot. By fixing up gd->ram_size
333 * the Linux kernel should now get passed the now "corrected"
334 * memory size and won't touch it either. This should work
335 * for arch/ppc and arch/powerpc. Only Linux board ports in
336 * arch/powerpc with bootwrapper support, that recalculate the
337 * memory size from the SDRAM controller setup will have to
338 * get fixed.
339 */
340 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
341 #endif
342 #ifdef CONFIG_SYS_SDRAM_BASE
343 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
344 #endif
345 gd->ram_top = gd->ram_base + get_effective_memsize();
346 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
347 gd->relocaddr = gd->ram_top;
348 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
349 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
350 /*
351 * We need to make sure the location we intend to put secondary core
352 * boot code is reserved and not used by any part of u-boot
353 */
354 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
355 gd->relocaddr = determine_mp_bootpg(NULL);
356 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
357 }
358 #endif
359 return 0;
360 }
361
362 #ifdef CONFIG_PRAM
363 /* reserve protected RAM */
reserve_pram(void)364 static int reserve_pram(void)
365 {
366 ulong reg;
367
368 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
369 gd->relocaddr -= (reg << 10); /* size is in kB */
370 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
371 gd->relocaddr);
372 return 0;
373 }
374 #endif /* CONFIG_PRAM */
375
376 /* Round memory pointer down to next 4 kB limit */
reserve_round_4k(void)377 static int reserve_round_4k(void)
378 {
379 gd->relocaddr &= ~(4096 - 1);
380 return 0;
381 }
382
arch_reserve_mmu(void)383 __weak int arch_reserve_mmu(void)
384 {
385 return 0;
386 }
387
reserve_video(void)388 static int reserve_video(void)
389 {
390 #ifdef CONFIG_DM_VIDEO
391 ulong addr;
392 int ret;
393
394 addr = gd->relocaddr;
395 ret = video_reserve(&addr);
396 if (ret)
397 return ret;
398 debug("Reserving %luk for video at: %08lx\n",
399 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
400 gd->relocaddr = addr;
401 #elif defined(CONFIG_LCD)
402 # ifdef CONFIG_FB_ADDR
403 gd->fb_base = CONFIG_FB_ADDR;
404 # else
405 /* reserve memory for LCD display (always full pages) */
406 gd->relocaddr = lcd_setmem(gd->relocaddr);
407 gd->fb_base = gd->relocaddr;
408 # endif /* CONFIG_FB_ADDR */
409 #endif
410
411 return 0;
412 }
413
reserve_trace(void)414 static int reserve_trace(void)
415 {
416 #ifdef CONFIG_TRACE
417 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
418 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
419 debug("Reserving %luk for trace data at: %08lx\n",
420 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
421 #endif
422
423 return 0;
424 }
425
reserve_uboot(void)426 static int reserve_uboot(void)
427 {
428 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
429 /*
430 * reserve memory for U-Boot code, data & bss
431 * round down to next 4 kB limit
432 */
433 gd->relocaddr -= gd->mon_len;
434 gd->relocaddr &= ~(4096 - 1);
435 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
436 /* round down to next 64 kB limit so that IVPR stays aligned */
437 gd->relocaddr &= ~(65536 - 1);
438 #endif
439
440 debug("Reserving %ldk for U-Boot at: %08lx\n",
441 gd->mon_len >> 10, gd->relocaddr);
442 }
443
444 gd->start_addr_sp = gd->relocaddr;
445
446 return 0;
447 }
448
449 /*
450 * reserve after start_addr_sp the requested size and make the stack pointer
451 * 16-byte aligned, this alignment is needed for cast on the reserved memory
452 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
453 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
454 */
reserve_stack_aligned(size_t size)455 static unsigned long reserve_stack_aligned(size_t size)
456 {
457 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
458 }
459
460 #ifdef CONFIG_SYS_NONCACHED_MEMORY
reserve_noncached(void)461 static int reserve_noncached(void)
462 {
463 /*
464 * The value of gd->start_addr_sp must match the value of malloc_start
465 * calculated in boatrd_f.c:initr_malloc(), which is passed to
466 * board_r.c:mem_malloc_init() and then used by
467 * cache.c:noncached_init()
468 *
469 * These calculations must match the code in cache.c:noncached_init()
470 */
471 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
472 MMU_SECTION_SIZE;
473 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
474 MMU_SECTION_SIZE);
475 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
476 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
477
478 return 0;
479 }
480 #endif
481
482 /* reserve memory for malloc() area */
reserve_malloc(void)483 static int reserve_malloc(void)
484 {
485 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
486 debug("Reserving %dk for malloc() at: %08lx\n",
487 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
488 #ifdef CONFIG_SYS_NONCACHED_MEMORY
489 reserve_noncached();
490 #endif
491
492 return 0;
493 }
494
495 /* (permanently) allocate a Board Info struct */
reserve_board(void)496 static int reserve_board(void)
497 {
498 if (!gd->bd) {
499 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
500 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
501 sizeof(struct bd_info));
502 memset(gd->bd, '\0', sizeof(struct bd_info));
503 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
504 sizeof(struct bd_info), gd->start_addr_sp);
505 }
506 return 0;
507 }
508
reserve_global_data(void)509 static int reserve_global_data(void)
510 {
511 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
512 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
513 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
514 sizeof(gd_t), gd->start_addr_sp);
515 return 0;
516 }
517
reserve_fdt(void)518 static int reserve_fdt(void)
519 {
520 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
521 /*
522 * If the device tree is sitting immediately above our image
523 * then we must relocate it. If it is embedded in the data
524 * section, then it will be relocated with other data.
525 */
526 if (gd->fdt_blob) {
527 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
528
529 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
530 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
531 debug("Reserving %lu Bytes for FDT at: %08lx\n",
532 gd->fdt_size, gd->start_addr_sp);
533 }
534 }
535
536 return 0;
537 }
538
reserve_bootstage(void)539 static int reserve_bootstage(void)
540 {
541 #ifdef CONFIG_BOOTSTAGE
542 int size = bootstage_get_size();
543
544 gd->start_addr_sp = reserve_stack_aligned(size);
545 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
546 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
547 gd->start_addr_sp);
548 #endif
549
550 return 0;
551 }
552
arch_reserve_stacks(void)553 __weak int arch_reserve_stacks(void)
554 {
555 return 0;
556 }
557
reserve_stacks(void)558 static int reserve_stacks(void)
559 {
560 /* make stack pointer 16-byte aligned */
561 gd->start_addr_sp = reserve_stack_aligned(16);
562
563 /*
564 * let the architecture-specific code tailor gd->start_addr_sp and
565 * gd->irq_sp
566 */
567 return arch_reserve_stacks();
568 }
569
reserve_bloblist(void)570 static int reserve_bloblist(void)
571 {
572 #ifdef CONFIG_BLOBLIST
573 /* Align to a 4KB boundary for easier reading of addresses */
574 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
575 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
576 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
577 CONFIG_BLOBLIST_SIZE_RELOC);
578 #endif
579
580 return 0;
581 }
582
display_new_sp(void)583 static int display_new_sp(void)
584 {
585 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
586
587 return 0;
588 }
589
arch_setup_bdinfo(void)590 __weak int arch_setup_bdinfo(void)
591 {
592 return 0;
593 }
594
setup_bdinfo(void)595 int setup_bdinfo(void)
596 {
597 struct bd_info *bd = gd->bd;
598
599 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
600 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
601 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
602 }
603
604 #ifdef CONFIG_MACH_TYPE
605 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
606 #endif
607
608 return arch_setup_bdinfo();
609 }
610
611 #ifdef CONFIG_POST
init_post(void)612 static int init_post(void)
613 {
614 post_bootmode_init();
615 post_run(NULL, POST_ROM | post_bootmode_get(0));
616
617 return 0;
618 }
619 #endif
620
reloc_fdt(void)621 static int reloc_fdt(void)
622 {
623 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
624 if (gd->flags & GD_FLG_SKIP_RELOC)
625 return 0;
626 if (gd->new_fdt) {
627 memcpy(gd->new_fdt, gd->fdt_blob,
628 fdt_totalsize(gd->fdt_blob));
629 gd->fdt_blob = gd->new_fdt;
630 }
631 }
632
633 return 0;
634 }
635
reloc_bootstage(void)636 static int reloc_bootstage(void)
637 {
638 #ifdef CONFIG_BOOTSTAGE
639 if (gd->flags & GD_FLG_SKIP_RELOC)
640 return 0;
641 if (gd->new_bootstage) {
642 int size = bootstage_get_size();
643
644 debug("Copying bootstage from %p to %p, size %x\n",
645 gd->bootstage, gd->new_bootstage, size);
646 memcpy(gd->new_bootstage, gd->bootstage, size);
647 gd->bootstage = gd->new_bootstage;
648 bootstage_relocate();
649 }
650 #endif
651
652 return 0;
653 }
654
reloc_bloblist(void)655 static int reloc_bloblist(void)
656 {
657 #ifdef CONFIG_BLOBLIST
658 if (gd->flags & GD_FLG_SKIP_RELOC)
659 return 0;
660 if (gd->new_bloblist) {
661 int size = CONFIG_BLOBLIST_SIZE;
662
663 debug("Copying bloblist from %p to %p, size %x\n",
664 gd->bloblist, gd->new_bloblist, size);
665 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
666 gd->bloblist, size);
667 gd->bloblist = gd->new_bloblist;
668 }
669 #endif
670
671 return 0;
672 }
673
setup_reloc(void)674 static int setup_reloc(void)
675 {
676 if (gd->flags & GD_FLG_SKIP_RELOC) {
677 debug("Skipping relocation due to flag\n");
678 return 0;
679 }
680
681 #ifdef CONFIG_SYS_TEXT_BASE
682 #ifdef ARM
683 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
684 #elif defined(CONFIG_M68K)
685 /*
686 * On all ColdFire arch cpu, monitor code starts always
687 * just after the default vector table location, so at 0x400
688 */
689 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
690 #elif !defined(CONFIG_SANDBOX)
691 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
692 #endif
693 #endif
694 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
695
696 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
697 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
698 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
699 gd->start_addr_sp);
700
701 return 0;
702 }
703
704 #ifdef CONFIG_OF_BOARD_FIXUP
fix_fdt(void)705 static int fix_fdt(void)
706 {
707 return board_fix_fdt((void *)gd->fdt_blob);
708 }
709 #endif
710
711 /* ARM calls relocate_code from its crt0.S */
712 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
713 !CONFIG_IS_ENABLED(X86_64)
714
jump_to_copy(void)715 static int jump_to_copy(void)
716 {
717 if (gd->flags & GD_FLG_SKIP_RELOC)
718 return 0;
719 /*
720 * x86 is special, but in a nice way. It uses a trampoline which
721 * enables the dcache if possible.
722 *
723 * For now, other archs use relocate_code(), which is implemented
724 * similarly for all archs. When we do generic relocation, hopefully
725 * we can make all archs enable the dcache prior to relocation.
726 */
727 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
728 /*
729 * SDRAM and console are now initialised. The final stack can now
730 * be setup in SDRAM. Code execution will continue in Flash, but
731 * with the stack in SDRAM and Global Data in temporary memory
732 * (CPU cache)
733 */
734 arch_setup_gd(gd->new_gd);
735 board_init_f_r_trampoline(gd->start_addr_sp);
736 #else
737 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
738 #endif
739
740 return 0;
741 }
742 #endif
743
744 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
initf_bootstage(void)745 static int initf_bootstage(void)
746 {
747 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
748 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
749 int ret;
750
751 ret = bootstage_init(!from_spl);
752 if (ret)
753 return ret;
754 if (from_spl) {
755 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
756 CONFIG_BOOTSTAGE_STASH_SIZE);
757
758 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
759 if (ret && ret != -ENOENT) {
760 debug("Failed to unstash bootstage: err=%d\n", ret);
761 return ret;
762 }
763 }
764
765 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
766
767 return 0;
768 }
769
initf_dm(void)770 static int initf_dm(void)
771 {
772 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
773 int ret;
774
775 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
776 ret = dm_init_and_scan(true);
777 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
778 if (ret)
779 return ret;
780
781 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
782 ret = dm_timer_init();
783 if (ret)
784 return ret;
785 }
786 #endif
787
788 return 0;
789 }
790
791 /* Architecture-specific memory reservation */
reserve_arch(void)792 __weak int reserve_arch(void)
793 {
794 return 0;
795 }
796
arch_cpu_init_dm(void)797 __weak int arch_cpu_init_dm(void)
798 {
799 return 0;
800 }
801
checkcpu(void)802 __weak int checkcpu(void)
803 {
804 return 0;
805 }
806
clear_bss(void)807 __weak int clear_bss(void)
808 {
809 return 0;
810 }
811
812 static const init_fnc_t init_sequence_f[] = {
813 setup_mon_len,
814 #ifdef CONFIG_OF_CONTROL
815 fdtdec_setup,
816 #endif
817 #ifdef CONFIG_TRACE_EARLY
818 trace_early_init,
819 #endif
820 initf_malloc,
821 log_init,
822 initf_bootstage, /* uses its own timer, so does not need DM */
823 #ifdef CONFIG_BLOBLIST
824 bloblist_init,
825 #endif
826 setup_spl_handoff,
827 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
828 console_record_init,
829 #endif
830 #if defined(CONFIG_HAVE_FSP)
831 arch_fsp_init,
832 #endif
833 arch_cpu_init, /* basic arch cpu dependent setup */
834 mach_cpu_init, /* SoC/machine dependent CPU setup */
835 initf_dm,
836 arch_cpu_init_dm,
837 #if defined(CONFIG_BOARD_EARLY_INIT_F)
838 board_early_init_f,
839 #endif
840 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
841 /* get CPU and bus clocks according to the environment variable */
842 get_clocks, /* get CPU and bus clocks (etc.) */
843 #endif
844 #if !defined(CONFIG_M68K)
845 timer_init, /* initialize timer */
846 #endif
847 #if defined(CONFIG_BOARD_POSTCLK_INIT)
848 board_postclk_init,
849 #endif
850 env_init, /* initialize environment */
851 init_baud_rate, /* initialze baudrate settings */
852 serial_init, /* serial communications setup */
853 console_init_f, /* stage 1 init of console */
854 display_options, /* say that we are here */
855 display_text_info, /* show debugging info if required */
856 checkcpu,
857 #if defined(CONFIG_SYSRESET)
858 print_resetinfo,
859 #endif
860 #if defined(CONFIG_DISPLAY_CPUINFO)
861 print_cpuinfo, /* display cpu info (and speed) */
862 #endif
863 #if defined(CONFIG_DTB_RESELECT)
864 embedded_dtb_select,
865 #endif
866 #if defined(CONFIG_DISPLAY_BOARDINFO)
867 show_board_info,
868 #endif
869 INIT_FUNC_WATCHDOG_INIT
870 #if defined(CONFIG_MISC_INIT_F)
871 misc_init_f,
872 #endif
873 INIT_FUNC_WATCHDOG_RESET
874 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
875 init_func_i2c,
876 #endif
877 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
878 init_func_vid,
879 #endif
880 announce_dram_init,
881 dram_init, /* configure available RAM banks */
882 #ifdef CONFIG_POST
883 post_init_f,
884 #endif
885 INIT_FUNC_WATCHDOG_RESET
886 #if defined(CONFIG_SYS_DRAM_TEST)
887 testdram,
888 #endif /* CONFIG_SYS_DRAM_TEST */
889 INIT_FUNC_WATCHDOG_RESET
890
891 #ifdef CONFIG_POST
892 init_post,
893 #endif
894 INIT_FUNC_WATCHDOG_RESET
895 /*
896 * Now that we have DRAM mapped and working, we can
897 * relocate the code and continue running from DRAM.
898 *
899 * Reserve memory at end of RAM for (top down in that order):
900 * - area that won't get touched by U-Boot and Linux (optional)
901 * - kernel log buffer
902 * - protected RAM
903 * - LCD framebuffer
904 * - monitor code
905 * - board info struct
906 */
907 setup_dest_addr,
908 #ifdef CONFIG_OF_BOARD_FIXUP
909 fix_fdt,
910 #endif
911 #ifdef CONFIG_PRAM
912 reserve_pram,
913 #endif
914 reserve_round_4k,
915 arch_reserve_mmu,
916 reserve_video,
917 reserve_trace,
918 reserve_uboot,
919 reserve_malloc,
920 reserve_board,
921 reserve_global_data,
922 reserve_fdt,
923 reserve_bootstage,
924 reserve_bloblist,
925 reserve_arch,
926 reserve_stacks,
927 dram_init_banksize,
928 show_dram_config,
929 INIT_FUNC_WATCHDOG_RESET
930 setup_bdinfo,
931 display_new_sp,
932 INIT_FUNC_WATCHDOG_RESET
933 reloc_fdt,
934 reloc_bootstage,
935 reloc_bloblist,
936 setup_reloc,
937 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
938 copy_uboot_to_ram,
939 do_elf_reloc_fixups,
940 #endif
941 clear_bss,
942 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
943 !CONFIG_IS_ENABLED(X86_64)
944 jump_to_copy,
945 #endif
946 NULL,
947 };
948
board_init_f(ulong boot_flags)949 void board_init_f(ulong boot_flags)
950 {
951 gd->flags = boot_flags;
952 gd->have_console = 0;
953
954 if (initcall_run_list(init_sequence_f))
955 hang();
956
957 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
958 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
959 !defined(CONFIG_ARC)
960 /* NOTREACHED - jump_to_copy() does not return */
961 hang();
962 #endif
963 }
964
965 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
966 /*
967 * For now this code is only used on x86.
968 *
969 * init_sequence_f_r is the list of init functions which are run when
970 * U-Boot is executing from Flash with a semi-limited 'C' environment.
971 * The following limitations must be considered when implementing an
972 * '_f_r' function:
973 * - 'static' variables are read-only
974 * - Global Data (gd->xxx) is read/write
975 *
976 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
977 * supported). It _should_, if possible, copy global data to RAM and
978 * initialise the CPU caches (to speed up the relocation process)
979 *
980 * NOTE: At present only x86 uses this route, but it is intended that
981 * all archs will move to this when generic relocation is implemented.
982 */
983 static const init_fnc_t init_sequence_f_r[] = {
984 #if !CONFIG_IS_ENABLED(X86_64)
985 init_cache_f_r,
986 #endif
987
988 NULL,
989 };
990
board_init_f_r(void)991 void board_init_f_r(void)
992 {
993 if (initcall_run_list(init_sequence_f_r))
994 hang();
995
996 /*
997 * The pre-relocation drivers may be using memory that has now gone
998 * away. Mark serial as unavailable - this will fall back to the debug
999 * UART if available.
1000 *
1001 * Do the same with log drivers since the memory may not be available.
1002 */
1003 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1004 #ifdef CONFIG_TIMER
1005 gd->timer = NULL;
1006 #endif
1007
1008 /*
1009 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1010 * Transfer execution from Flash to RAM by calculating the address
1011 * of the in-RAM copy of board_init_r() and calling it
1012 */
1013 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1014
1015 /* NOTREACHED - board_init_r() does not return */
1016 hang();
1017 }
1018 #endif /* CONFIG_X86 */
1019