1 /* 2 * Arm SCP/MCP Software 3 * Copyright (c) 2019-2021, Arm Limited and Contributors. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 * Description: 8 * Juno Shared Data Structures (SDS) definitions. 9 */ 10 11 #ifndef JUNO_SDS_H 12 #define JUNO_SDS_H 13 14 #include <mod_sds.h> 15 16 /* 17 * Structure identifiers. 18 */ 19 enum juno_sds_struct_id { 20 JUNO_SDS_CPU_INFO = 1 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 21 JUNO_SDS_ROM_VERSION = 2 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 22 JUNO_SDS_RAM_VERSION = 3 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 23 JUNO_SDS_PLATFORM_ID = 4 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 24 JUNO_SDS_RESET_SYNDROME = 5 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 25 JUNO_SDS_FEATURE_AVAILABILITY = 6 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 26 JUNO_SDS_CPU_BOOTCTR = 7 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 27 JUNO_SDS_CPU_FLAGS = 8 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 28 JUNO_SDS_BOOTLOADER = 9 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 29 }; 30 31 enum juno_sds_region_idx { 32 JUNO_SDS_REGION_SECURE, 33 JUNO_SDS_REGION_COUNT, 34 }; 35 36 /* 37 * Structure sizes. 38 */ 39 #define JUNO_SDS_CPU_INFO_SIZE 4 40 #define JUNO_SDS_ROM_VERSION_SIZE 4 41 #define JUNO_SDS_RAM_VERSION_SIZE 4 42 #define JUNO_SDS_PLATFORM_ID_SIZE 8 43 #define JUNO_SDS_RESET_SYNDROME_SIZE 4 44 #define JUNO_SDS_FEATURE_AVAILABILITY_SIZE 4 45 #define JUNO_SDS_CPU_BOOTCTR_SIZE 8 46 #define JUNO_SDS_CPU_FLAGS_SIZE 8 47 #define JUNO_SDS_BOOTLOADER_SIZE 12 48 49 /* 50 * Field masks and offsets for the JUNO_SDS_AP_CPU_INFO structure. 51 */ 52 #define JUNO_SDS_CPU_INFO_PRIMARY_MASK 0xFFFFFFFF 53 #define JUNO_SDS_CPU_INFO_PRIMARY_POS 0 54 55 /* 56 * Structure, field masks and offsets for the JUNO_SDS_PLATFORM_ID structure. 57 */ 58 struct juno_sds_platid { 59 uint32_t platform_identifier; 60 uint32_t platform_type_identifier; 61 }; 62 63 enum juno_sds_ram_idx { 64 JUNO_SDS_RAM_VERSION_IDX, 65 JUNO_SDS_RAM_FEATURES_IDX, 66 JUNO_SDS_RAM_IDX_COUNT 67 }; 68 69 enum juno_sds_rom_idx { 70 JUNO_SDS_ROM_CPU_INFO_IDX, 71 JUNO_SDS_ROM_VERSION_IDX, 72 JUNO_SDS_ROM_PLATFORM_ID_IDX, 73 JUNO_SDS_ROM_RESET_SYNDROME_IDX, 74 JUNO_SDS_ROM_BOOTLOADER_IDX, 75 JUNO_SDS_ROM_FEATURES_IDX, 76 JUNO_SDS_ROM_BOOT_COUNTER_IDX, 77 JUNO_SDS_ROM_CPU_FLAGS_IDX, 78 JUNO_SDS_ROM_IDX_COUNT 79 }; 80 81 #define JUNO_SDS_PLATID_PARTNO_MASK 0xFFF 82 #define JUNO_SDS_PLATID_DESIGNER_MASK 0xFF000 83 #define JUNO_SDS_PLATID_REV_MINOR_MASK 0xF00000 84 #define JUNO_SDS_PLATID_REV_MAJOR_MASK 0xF000000 85 #define JUNO_SDS_PLATID_CONFIG_MASK 0xF0000000 86 #define JUNO_SDS_PLATID_TYPE_MASK 0xF 87 88 #define JUNO_SDS_PLATID_PARTNO_POS 0 89 #define JUNO_SDS_PLATID_DESIGNER_POS 12 90 #define JUNO_SDS_PLATID_REV_MINOR_POS 20 91 #define JUNO_SDS_PLATID_REV_MAJOR_POS 24 92 #define JUNO_SDS_PLATID_CONFIG_POS 28 93 94 #define JUNO_SDS_PLATID_TYPE_POS 0 95 96 /* 97 * Field masks and offsets for the JUNO_SDS_RESET_SYNDROME structure. 98 */ 99 #define JUNO_SDS_RESET_SYNDROME_POR_MASK 0x1 100 #define JUNO_SDS_RESET_SYNDROME_WDOGSCP_MASK 0x2 101 #define JUNO_SDS_RESET_SYNDROME_WDOGAP_MASK 0x4 102 #define JUNO_SDS_RESET_SYNDROME_SYSRESET_MASK 0x8 103 #define JUNO_SDS_RESET_SYNDROME_M3LOCKUP_MASK 0x10 104 105 #define JUNO_SDS_RESET_SYNDROME_POR_POS 0 106 #define JUNO_SDS_RESET_SYNDROME_WDOGSCP_POS 1 107 #define JUNO_SDS_RESET_SYNDROME_WDOGAP_POS 2 108 #define JUNO_SDS_RESET_SYNDROME_SYSRESET_POS 3 109 #define JUNO_SDS_RESET_SYNDROME_M3LOCKUP_POS 4 110 111 /* 112 * Field masks and offsets for the JUNO_SDS_FEATURE_AVAILABILITY structure. 113 */ 114 #define JUNO_SDS_FEATURE_FIRMWARE_MASK 0x1 115 #define JUNO_SDS_FEATURE_DMC_MASK 0x2 116 #define JUNO_SDS_FEATURE_MESSAGING_MASK 0x4 117 118 #define JUNO_SDS_FEATURE_FIRMWARE_POS 0 119 #define JUNO_SDS_FEATURE_DMC_POS 1 120 #define JUNO_SDS_FEATURE_MESSAGING_POS 2 121 122 /* 123 * Field masks and offsets for the JUNO_SDS_CPU_BOOTCTR structure. 124 */ 125 #define JUNO_SDS_CPU_BOOTCTR_CPU0_MASK 0xFF 126 #define JUNO_SDS_CPU_BOOTCTR_CPU1_MASK 0xFF00 127 #define JUNO_SDS_CPU_BOOTCTR_CPU2_MASK 0xFF0000 128 #define JUNO_SDS_CPU_BOOTCTR_CPU3_MASK 0xFF000000 129 #define JUNO_SDS_CPU_BOOTCTR_CPU4_MASK 0xFF 130 #define JUNO_SDS_CPU_BOOTCTR_CPU5_MASK 0xFF00 131 #define JUNO_SDS_CPU_BOOTCTR_CPU6_MASK 0xFF0000 132 #define JUNO_SDS_CPU_BOOTCTR_CPU7_MASK 0xFF000000 133 134 #define JUNO_SDS_CPU_BOOTCTR_CPU0_POS 0 135 #define JUNO_SDS_CPU_BOOTCTR_CPU1_POS 8 136 #define JUNO_SDS_CPU_BOOTCTR_CPU2_POS 16 137 #define JUNO_SDS_CPU_BOOTCTR_CPU3_POS 24 138 #define JUNO_SDS_CPU_BOOTCTR_CPU4_POS 0 139 #define JUNO_SDS_CPU_BOOTCTR_CPU5_POS 8 140 #define JUNO_SDS_CPU_BOOTCTR_CPU6_POS 16 141 #define JUNO_SDS_CPU_BOOTCTR_CPU7_POS 24 142 143 /* 144 * Field masks and offsets for the JUNO_SDS_CPU_FLAGS structure. 145 */ 146 #define JUNO_SDS_CPU_FLAGS_CPU0_WFI_MASK 0x1 147 #define JUNO_SDS_CPU_FLAGS_CPU1_WFI_MASK 0x100 148 #define JUNO_SDS_CPU_FLAGS_CPU2_WFI_MASK 0x10000 149 #define JUNO_SDS_CPU_FLAGS_CPU3_WFI_MASK 0x1000000 150 #define JUNO_SDS_CPU_FLAGS_CPU4_WFI_MASK 0x1 151 #define JUNO_SDS_CPU_FLAGS_CPU5_WFI_MASK 0x100 152 #define JUNO_SDS_CPU_FLAGS_CPU6_WFI_MASK 0x10000 153 #define JUNO_SDS_CPU_FLAGS_CPU7_WFI_MASK 0x1000000 154 155 #define JUNO_SDS_CPU_FLAGS_CPU0_WFI_POS 0 156 #define JUNO_SDS_CPU_FLAGS_CPU1_WFI_POS 8 157 #define JUNO_SDS_CPU_FLAGS_CPU2_WFI_POS 16 158 #define JUNO_SDS_CPU_FLAGS_CPU3_WFI_POS 24 159 #define JUNO_SDS_CPU_FLAGS_CPU4_WFI_POS 0 160 #define JUNO_SDS_CPU_FLAGS_CPU5_WFI_POS 8 161 #define JUNO_SDS_CPU_FLAGS_CPU6_WFI_POS 16 162 #define JUNO_SDS_CPU_FLAGS_CPU7_WFI_POS 24 163 164 /* 165 * Field masks and offsets for the JUNO_SDS_BOOTLOADER structure. 166 */ 167 #define JUNO_SDS_BOOTLOADER_VALID_MASK 0x1 168 #define JUNO_SDS_BOOTLOADER_OFFSET_MASK 0xFFFFFFFF 169 #define JUNO_SDS_BOOTLOADER_SIZE_MASK 0xFFFFFFFF 170 171 #define JUNO_SDS_BOOTLOADER_VALID_POS 0 172 #define JUNO_SDS_BOOTLOADER_OFFSET_POS 0 173 #define JUNO_SDS_BOOTLOADER_SIZE_POS 0 174 175 #endif /* JUNO_SDS_H */ 176