1 /*
2  * Renesas SCP/MCP Software
3  * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights
4  * reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef MOD_RCAR_RESET_H
10 #define MOD_RCAR_RESET_H
11 
12 #include <stdint.h>
13 #include <fwk_element.h>
14 #include <rcar_mmap.h>
15 #include <mod_reset_domain.h>
16 
17 /*!
18  * \addtogroup GroupRCARModule RCAR Product Modules
19  * @{
20  */
21 
22 /*!
23  * \defgroup GroupRCARReset Reset
24  * @{
25  */
26 
27 /*!
28  * \brief APIs provided by the driver.
29  */
30 enum mod_rcar_reset_api_type {
31     MOD_RCAR_RESET_API_TYPE_CLOCK,
32     MOD_RCAR_RESET_API_COUNT,
33 };
34 
35 /*!
36  * \brief Subsystem reset device configuration.
37  */
38 struct mod_rcar_reset_dev_config {
39     /*! Pointer to the reset's control register. */
40     volatile uint32_t const control_reg;
41 
42     /*! enable / disable bit position. */
43     volatile uint32_t const bit;
44 };
45 
46 /*!
47  * @cond
48  */
49 
50 /* Device context */
51 struct rcar_reset_dev_ctx {
52     const struct mod_rcar_reset_dev_config *config;
53     struct mod_reset_domain_drv_api *api;
54 };
55 
56 /* Module context */
57 struct rcar_reset_ctx {
58     struct rcar_reset_dev_ctx *dev_ctx_table;
59     unsigned int dev_count;
60 };
61 
62 /*
63  * Module Reset Control Register offsets
64  */
65 static const uint16_t srcr[] = {
66     0x0A0, 0x0A8, 0x0B0, 0x0B8, 0x0BC, 0x0C4, 0x1C8, 0x1CC,
67     0x920, 0x924, 0x928, 0x92C,
68 };
69 #define CPG_SMSTPCR1    1
70 #define CPG_SMSTPCR2    2
71 #define CPG_SMSTPCR3    3
72 #define CPG_SMSTPCR4    4
73 #define CPG_SMSTPCR5    5
74 #define CPG_SMSTPCR6    6
75 #define CPG_SMSTPCR7    7
76 #define CPG_SMSTPCR8    8
77 #define CPG_SMSTPCR9    9
78 #define CPG_SMSTPCR10   10
79 
80 /* Software Reset Clearing Register offsets */
81 #define SRSTCLR(i) (0x940 + (i) * 4)
82 
83 #define DELAY_CNT_1US       (10UL)
84 #define SCSR_DELAY_US       (DELAY_CNT_1US * 35)
85 
86 /*!
87  * @endcond
88  */
89 
90 /*!
91  * @}
92  */
93 
94 /*!
95  * @}
96  */
97 
98 #endif /* MOD_RCAR_RESET_H */
99