1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved 4 */ 5 6/ { 7 aliases { 8#if !STM32MP_EMMC && !STM32MP_SDMMC 9 /delete-property/ mmc0; 10 /delete-property/ mmc1; 11#endif 12 }; 13 14 soc { 15#if !STM32MP_USB_PROGRAMMER 16 /delete-node/ usb-otg@49000000; 17#endif 18#if !STM32MP_RAW_NAND 19 /delete-node/ memory-controller@58002000; 20#endif 21#if !STM32MP_SPI_NAND && !STM32MP_SPI_NOR 22 /delete-node/ spi@58003000; 23#endif 24#if !STM32MP_EMMC && !STM32MP_SDMMC 25 /delete-node/ mmc@58005000; 26 /delete-node/ mmc@58007000; 27#endif 28#if !STM32MP_USB_PROGRAMMER 29 /delete-node/ usbh-ohci@5800c000; 30 /delete-node/ usbh-ehci@5800d000; 31#endif 32#if !STM32MP_USB_PROGRAMMER 33 /delete-node/ usbphyc@5a006000; 34#endif 35 36 pinctrl@50002000 { 37#if !STM32MP_EMMC && !STM32MP_SDMMC 38 /delete-node/ sdmmc1-b4-0; 39 /delete-node/ sdmmc2-b4-0; 40#endif 41 }; 42 }; 43 44 /* 45 * UUID's here are UUID RFC 4122 compliant meaning fieds are stored in 46 * network order (big endian) 47 */ 48 49 st-io_policies { 50 fip-handles { 51 compatible = "st,io-fip-handle"; 52 fw_cfg_uuid = "5807e16a-8459-47be-8ed5-648e8dddab0e"; 53 bl32_uuid = "05d0e189-53dc-1347-8d2b-500a4b7a3e38"; 54 bl32_extra1_uuid = "0b70c29b-2a5a-7840-9f65-0a5682738288"; 55 bl32_extra2_uuid = "8ea87bb1-cfa2-3f4d-85fd-e7bba50220d9"; 56 bl33_uuid = "d6d0eea7-fcea-d54b-9782-9934f234b6e4"; 57 hw_cfg_uuid = "08b8f1d9-c9cf-9349-a962-6fbc6b7265cc"; 58 tos_fw_cfg_uuid = "26257c1a-dbc6-7f47-8d96-c4c4b0248021"; 59#if TRUSTED_BOARD_BOOT 60 stm32mp_cfg_cert_uuid = "501d8dd2-8bce-49a5-84eb-559a9f2eaeaf"; 61 t_key_cert_uuid = "827ee890-f860-e411-a1b4-777a21b4f94c"; 62 tos_fw_key_cert_uuid = "9477d603-fb60-e411-85dd-b7105b8cee04"; 63 nt_fw_key_cert_uuid = "8ad5832a-fb60-e411-8aaf-df30bbc49859"; 64 tos_fw_content_cert_uuid = "a49f4411-5e63-e411-8728-3f05722af33d"; 65 nt_fw_content_cert_uuid = "8ec4c1f3-5d63-e411-a7a9-87ee40b23fa7"; 66#endif 67 }; 68 }; 69 70#if TRUSTED_BOARD_BOOT 71 tb_fw-config { 72 compatible = "arm,tb_fw"; 73 74 /* Disable authentication for development */ 75 disable_auth = <0x0>; 76 77 /* Use SRAM2 to manage the mbedTLS heap */ 78 mbedtls_heap_addr = <0x0 0x30004000>; /* SRAM2_BASE */ 79 mbedtls_heap_size = <0x2000>; /* SRAM2_SIZE */ 80 }; 81 82#include "stm32mp1-cot-descriptors.dtsi" 83#endif 84 85}; 86