Searched refs:ddr_timing (Results 1 – 1 of 1) sorted by relevance
39 u32 ddr_timing; member325 clksel = priv->ddr_timing; in dw_mci_exynos_set_ios()336 clksel = (priv->ddr_timing & 0xfff8ffff) | in dw_mci_exynos_set_ios()392 priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
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