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Searched refs:PCI_BASE_ADDRESS_1 (Results 1 – 24 of 24) sorted by relevance

/u-boot-v2022.01-rc1/board/freescale/common/
A Dcds_via.c50 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1ff4); in mpc85xx_config_via_usbide()
81 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1dfc); in mpc85xx_config_via_power()
/u-boot-v2022.01-rc1/arch/x86/cpu/apollolake/
A Dcpu_common.c84 pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32); in p2sb_enable_bar()
A Dpmc.c175 pci_x86_write_config(pmc, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32); in enable_pmcbar()
/u-boot-v2022.01-rc1/drivers/power/acpi_pmc/
A Dpmc_emul.c76 case PCI_BASE_ADDRESS_1: in sandbox_pmc_emul_read_config()
109 case PCI_BASE_ADDRESS_1: { in sandbox_pmc_emul_write_config()
/u-boot-v2022.01-rc1/drivers/misc/
A Dp2sb_emul.c82 case PCI_BASE_ADDRESS_1: in sandbox_p2sb_emul_read_config()
115 case PCI_BASE_ADDRESS_1: { in sandbox_p2sb_emul_write_config()
A Dswap_case.c138 case PCI_BASE_ADDRESS_1: in sandbox_swap_case_read_config()
210 case PCI_BASE_ADDRESS_1: { in sandbox_swap_case_write_config()
/u-boot-v2022.01-rc1/drivers/bios_emulator/
A Datibios.c350 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
356 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
400 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); in PCI_unmapBIOSImage()
/u-boot-v2022.01-rc1/test/dm/
A Dpci.c275 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); in dm_test_pci_ea()
279 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); in dm_test_pci_ea()
/u-boot-v2022.01-rc1/arch/x86/cpu/intel_common/
A Dp2sb.c68 pci_x86_write_config(pdev, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32); in p2sb_early_init()
/u-boot-v2022.01-rc1/cmd/
A Dpci.c158 { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
175 { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
A Duniverse.c55 pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_1, &val); in universe_init()
/u-boot-v2022.01-rc1/drivers/pci/
A Dpci-rcar-gen2.c207 writel(CONFIG_SYS_SDRAM_BASE & 0xf0000000, devad + PCI_BASE_ADDRESS_1); in rcar_gen2_pci_probe()
A Dpcie_layerscape_ep.c140 writel(mask, bar_base + PCI_BASE_ADDRESS_1); in ls_pcie_ep_setup_bar()
A Dpcie_dw_common.c289 writel(0x0, pci->dbi_base + PCI_BASE_ADDRESS_1); in pcie_dw_setup_host()
A Dpcie_layerscape_rc.c224 dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1); in ls_pcie_disable_bars()
A Dpci-aardvark.c586 (offset & ~3) == PCI_BASE_ADDRESS_1) in pcie_advk_write_config()
/u-boot-v2022.01-rc1/drivers/net/
A Dpcnet.c544 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &bar); in pcnet_initialize()
647 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in pcnet_probe()
A Drtl8139.c619 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in rtl8139_initialize()
742 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in rtl8139_probe()
A Ddc2114x.c585 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase); in dc21x4x_initialize()
717 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in dc2114x_probe()
A Dpch_gbe.c452 iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM); in pch_gbe_probe()
A Dns8382x.c322 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in ns8382x_initialize()
A Duli526x.c219 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in uli526x_initialize()
/u-boot-v2022.01-rc1/drivers/ata/
A Dsata_sil3114.c659 pci_read_config_dword (devno, PCI_BASE_ADDRESS_1, &iobase[1]); in init_sata()
/u-boot-v2022.01-rc1/include/
A Dpci.h201 #define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ macro

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