ddr3_set_sw_wl_rl_debug (reference) in projects: u-boot-v2022.01-rc1

Searched refs:ddr3_set_sw_wl_rl_debug (Results 1 – 2 of 2) sorted by relevance

/u-boot-v2022.01-rc1/drivers/ddr/marvell/axp/
A D	ddr3_init.c	`38 extern void ddr3_set_sw_wl_rl_debug(u32); 281 ddr3_set_sw_wl_rl_debug(DDR3_RUN_SW_WHEN_HW_FAIL); in ddr3_init()`
A D	ddr3_hw_training.c	`69 void ddr3_set_sw_wl_rl_debug(u32 val) in ddr3_set_sw_wl_rl_debug() function`

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