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Searched refs:ddr_reg (Results 1 – 4 of 4) sorted by relevance

/u-boot-v2022.01-rc1/drivers/ddr/fsl/
A Dmain.c500 fsl_ddr_cfg_regs_t *ddr_reg = pinfo->fsl_ddr_config_reg; in fsl_ddr_compute() local
641 memset(&ddr_reg[i], 0, in fsl_ddr_compute()
649 &ddr_reg[i], &timing_params[i], in fsl_ddr_compute()
670 fsl_ddr_cfg_regs_t *reg = &ddr_reg[i]; in fsl_ddr_compute()
/u-boot-v2022.01-rc1/drivers/ram/stm32mp1/
A Dstm32mp1_ddr.c74 static const struct reg_desc ddr_reg[DDRCTL_REG_REG_SIZE] = { variable
271 "static", ddr_reg, DDRCTL_REG_REG_SIZE, DDR_BASE},
/u-boot-v2022.01-rc1/arch/arm/dts/
A Dtegra30-beaver.dts258 ddr_reg: regulator@2 { label
A Dtegra30-cardhu.dts371 ddr_reg: regulator@100 { label

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