Searched refs:h_sync_width (Results 1 – 14 of 14) sorted by relevance
| /u-boot-v2022.01-rc1/drivers/video/ |
| A D | logicore_dp_tx.h | 43 u16 h_sync_width; member
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| A D | logicore_dp_tx.c | 140 u16 h_sync_width; member
2087 set_reg(dev, REG_MAIN_STREAM_HSWIDTH, msa_config->h_sync_width); in set_msa_values()
2132 dp_tx->main_stream_attributes.h_sync_width = msa->h_sync_width; in logicore_dp_tx_set_msa()
2206 .h_sync_width = 96, in logicore_dp_tx_enable()
2223 .h_sync_width = 108, in logicore_dp_tx_enable()
2240 .h_sync_width = 136, in logicore_dp_tx_enable()
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| A D | nexell_display.c | 48 sync->h_sync_width = ofnode_read_s32_default(node, "h_sync_width", 0); in nx_display_parse_dp_sync()
61 sync->h_active_len, sync->h_sync_width, in nx_display_parse_dp_sync()
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| /u-boot-v2022.01-rc1/drivers/video/nexell/ |
| A D | s5pxx18_dp_hdmi.c | 127 sync->h_sync_width = 40; in hdmi_get_vsync()
140 sync->h_sync_width = 44; in hdmi_get_vsync()
169 ctrl->vs_start_offset = (sync->h_front_porch + sync->h_sync_width + in hdmi_get_vsync()
174 ctrl->ev_start_offset = (sync->h_front_porch + sync->h_sync_width + in hdmi_get_vsync()
209 int hsw = sync->h_sync_width; in hdmi_vsync()
230 int hsw = sync->h_sync_width; in hdmi_prepare()
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| A D | s5pxx18_dp.c | 141 nx_dpc_set_hsync(module, sync->h_active_len, sync->h_sync_width, in dp_control_setup()
169 sync->h_back_porch, sync->h_sync_width, sync->h_sync_invert); in dp_control_setup()
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| A D | s5pxx18_dp_mipi.c | 270 int HS = sync->h_sync_width; in mipi_enable()
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| /u-boot-v2022.01-rc1/arch/arm/mach-exynos/include/mach/ |
| A D | dp_info.h | 28 unsigned int h_sync_width; member
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| /u-boot-v2022.01-rc1/arch/arm/dts/ |
| A D | s5p4418-nanopi2.dts | 78 h_sync_width = <88>;
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| /u-boot-v2022.01-rc1/drivers/video/imx/ |
| A D | ipu_disp.c | 832 uint16_t h_start_width, uint16_t h_sync_width, in ipu_init_sync_panel() argument
846 if ((v_sync_width == 0) || (h_sync_width == 0)) in ipu_init_sync_panel()
855 h_total = width + h_sync_width + h_start_width + h_end_width; in ipu_init_sync_panel()
1087 DI_SYNC_CLK, 0, h_sync_width * 2); in ipu_init_sync_panel()
1103 h_sync_width + h_start_width, DI_SYNC_CLK, in ipu_init_sync_panel()
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| A D | ipu.h | 232 uint16_t h_start_width, uint16_t h_sync_width,
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| /u-boot-v2022.01-rc1/arch/arm/mach-nexell/include/mach/ |
| A D | display.h | 66 int h_sync_width; member
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| /u-boot-v2022.01-rc1/drivers/video/exynos/ |
| A D | exynos_dp.c | 34 disp_info->h_total = disp_info->h_res + disp_info->h_sync_width + in exynos_dp_disp_info()
896 priv->disp_info.h_sync_width = fdtdec_get_int(blob, node, in exynos_dp_of_to_plat()
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| A D | exynos_dp_lowlevel.c | 1096 writel(H_SYNC_PORCH_CFG_L(priv->disp_info.h_sync_width), in exynos_dp_config_video_bist()
1098 writel(H_SYNC_PORCH_CFG_H(priv->disp_info.h_sync_width), in exynos_dp_config_video_bist()
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| /u-boot-v2022.01-rc1/board/friendlyarm/nanopi2/ |
| A D | board.c | 139 sync->h_sync_width = timing->h_sw; in nx_display_fixup_dp()
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