| /u-boot-v2022.01-rc1/arch/powerpc/dts/ |
| A D | t4240.dtsi | 25 fsl,portid-mapping = <0x80000000>;
30 fsl,portid-mapping = <0x80000000>;
35 fsl,portid-mapping = <0x80000000>;
40 fsl,portid-mapping = <0x80000000>;
45 fsl,portid-mapping = <0x80000000>;
50 fsl,portid-mapping = <0x80000000>;
55 fsl,portid-mapping = <0x80000000>;
60 fsl,portid-mapping = <0x80000000>;
65 fsl,portid-mapping = <0x80000000>;
70 fsl,portid-mapping = <0x80000000>;
[all …]
|
| A D | p4080.dtsi | 26 fsl,portid-mapping = <0x80000000>;
31 fsl,portid-mapping = <0x40000000>;
36 fsl,portid-mapping = <0x20000000>;
41 fsl,portid-mapping = <0x10000000>;
46 fsl,portid-mapping = <0x08000000>;
51 fsl,portid-mapping = <0x04000000>;
56 fsl,portid-mapping = <0x02000000>;
61 fsl,portid-mapping = <0x01000000>;
|
| A D | p5040.dtsi | 25 fsl,portid-mapping = <0x80000000>;
30 fsl,portid-mapping = <0x40000000>;
35 fsl,portid-mapping = <0x20000000>;
40 fsl,portid-mapping = <0x10000000>;
|
| A D | p2041.dtsi | 26 fsl,portid-mapping = <0x80000000>;
31 fsl,portid-mapping = <0x40000000>;
36 fsl,portid-mapping = <0x20000000>;
41 fsl,portid-mapping = <0x10000000>;
|
| A D | p3041.dtsi | 26 fsl,portid-mapping = <0x80000000>;
31 fsl,portid-mapping = <0x40000000>;
36 fsl,portid-mapping = <0x20000000>;
41 fsl,portid-mapping = <0x10000000>;
|
| A D | t2080.dtsi | 25 fsl,portid-mapping = <0x80000000>;
30 fsl,portid-mapping = <0x80000000>;
35 fsl,portid-mapping = <0x80000000>;
40 fsl,portid-mapping = <0x80000000>;
|
| /u-boot-v2022.01-rc1/drivers/ddr/fsl/ |
| A D | ddr4_dimm_params.c | 227 if (spd->mapping[i] == udimm_rc_e_dq[i]) in ddr_compute_dimm_parameters()
231 60 + i, spd->mapping[i], in ddr_compute_dimm_parameters()
233 ptr = (u8 *)&spd->mapping[i]; in ddr_compute_dimm_parameters()
362 pdimm->dq_mapping[i] = spd->mapping[i]; in ddr_compute_dimm_parameters()
364 pdimm->dq_mapping_ors = ((spd->mapping[0] >> 6) & 0x3) == 0 ? 1 : 0; in ddr_compute_dimm_parameters()
|
| /u-boot-v2022.01-rc1/doc/device-tree-bindings/video/ |
| A D | rockchip-lvds.txt | 15 - rockchip,data-mapping: should be <LVDS_FORMAT_VESA> or <LVDS_FORMAT_JEIDA>,
58 rockchip,data-mapping = <LVDS_FORMAT_VESA>;
|
| /u-boot-v2022.01-rc1/arch/mips/mach-jz47xx/jz4780/ |
| A D | TODO | 4 - define the remaining register base addresses as physical addresses and establish a mapping with i…
|
| /u-boot-v2022.01-rc1/arch/arm/dts/ |
| A D | imx6q-icore-ofcap10.dts | 21 fsl,data-mapping = "spwg";
|
| A D | fsl-ls1043-post.dtsi | 27 /* these aliases provide the FMan ports mapping */
|
| A D | imx6q-icore.dts | 38 fsl,data-mapping = "spwg";
|
| A D | fsl-ls1046-post.dtsi | 25 /* these aliases provide the FMan ports mapping */
|
| A D | rk3368-px5-evb-u-boot.dtsi | 21 * affects the physical-address to device-address mapping.
|
| /u-boot-v2022.01-rc1/arch/mips/dts/ |
| A D | mrvl,cn73xx.dtsi | 19 ranges; /* Direct mapping */
180 ranges; /* Direct mapping */
212 ranges; /* Direct mapping */
255 ranges; /* Direct mapping */
|
| /u-boot-v2022.01-rc1/doc/device-tree-bindings/spmi/ |
| A D | spmi-msm.txt | 8 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn)
|
| /u-boot-v2022.01-rc1/drivers/ |
| A D | Kconfig | 150 bool "Custom physical to bus address mapping"
154 your platform's Kconfig, and implement the appropriate mapping
|
| /u-boot-v2022.01-rc1/include/net/pfe_eth/ |
| A D | pfe_eth.h | 57 #error DDR mapping above 12MiB
|
| /u-boot-v2022.01-rc1/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| A D | README.pci_iommu_extra | 36 it needs a mapping
61 To add an iommu mapping for a hot-plugged device, please see following example:
|
| /u-boot-v2022.01-rc1/doc/device-tree-bindings/mtd/ |
| A D | mtd-physmap.txt | 20 mapping of the flash.
21 On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
|
| /u-boot-v2022.01-rc1/doc/device-tree-bindings/thermal/ |
| A D | ti_soc_thermal.txt | 17 the mapping may change from soc to soc, apart from depending
|
| /u-boot-v2022.01-rc1/doc/device-tree-bindings/sysinfo/ |
| A D | gpio-sysinfo.txt | 7 Each GPIO may be floating, pulled-up, or pulled-down, mapping to digits 2, 1,
|
| /u-boot-v2022.01-rc1/arch/x86/include/asm/acpi/cros_ec/ |
| A D | als.asl | 36 * of integers mapping ambient light illuminance to display brightness.
|
| /u-boot-v2022.01-rc1/board/cadence/xtfpga/ |
| A D | README | 52 the boot mapping and selects from a range of default ethernet MAC
59 (on, 1, up). This mapping is implemented in the FPGA bitstream
96 The KC705 board contains 4-way DIP switch, way 1 is the boot mapping
|
| /u-boot-v2022.01-rc1/arch/arm/mach-versal/ |
| A D | Kconfig | 57 bool "Disable DDR MMU mapping"
|