/u-boot-v2022.01-rc1/arch/mips/mach-mtmips/mt7620/ |
A D | init.c | 41 setbits_32(sysc + SYSCTL_CPLL_CFG0_REG, CPLL_SW_CFG); in cpu_pll_init() 44 setbits_32(sysc + SYSCTL_CPLL_CFG1_REG, CPLL_PD); in cpu_pll_init() 52 clrbits_32(sysc + SYSCTL_CPLL_CFG1_REG, CPLL_PD); in cpu_pll_init() 62 clrsetbits_32(sysc + SYSCTL_CPU_SYS_CLKCFG_REG, in cpu_pll_init() 92 val = readl(sysc + SYSCTL_SYSCFG0_REG); in mt7620_get_clks() 101 val = readl(sysc + SYSCTL_CPLL_CFG1_REG); in mt7620_get_clks() 107 val = readl(sysc + SYSCTL_CPLL_CFG0_REG); in mt7620_get_clks() 118 val = readl(sysc + SYSCTL_CUR_CLK_STS_REG); in mt7620_get_clks() 153 val = readl(sysc + SYSCTL_CHIP_REV_ID_REG); in print_cpuinfo() 158 val = readl(sysc + SYSCTL_SYSCFG0_REG); in print_cpuinfo() [all …]
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A D | dram.c | 59 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_memc_reset() local 62 setbits_32(sysc + SYSCTL_RSTCTL_REG, MC_RST); in mt7620_memc_reset() 64 clrbits_32(sysc + SYSCTL_RSTCTL_REG, MC_RST); in mt7620_memc_reset() 69 void __iomem *sysc; in mt7620_dram_init() local 74 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_dram_init() 75 ddr_type = (readl(sysc + SYSCTL_SYSCFG0_REG) & DRAM_TYPE_M) in mt7620_dram_init() 77 aux = readl(sysc + SYSCTL_CPLL_CFG1_REG) & in mt7620_dram_init()
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/u-boot-v2022.01-rc1/arch/arm/dts/ |
A D | omap4-l4.dtsi | 45 compatible = "ti,sysc-omap4", "ti,sysc"; 88 compatible = "ti,sysc-omap4", "ti,sysc"; 113 compatible = "ti,sysc-omap4", "ti,sysc"; 138 compatible = "ti,sysc-omap2", "ti,sysc"; 175 compatible = "ti,sysc-omap2", "ti,sysc"; 242 compatible = "ti,sysc-omap2", "ti,sysc"; 270 compatible = "ti,sysc-omap4", "ti,sysc"; 321 compatible = "ti,sysc-omap2", "ti,sysc"; 386 compatible = "ti,sysc-omap2", "ti,sysc"; 425 compatible = "ti,sysc-omap2", "ti,sysc"; [all …]
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A D | omap5-l4.dtsi | 53 compatible = "ti,sysc-omap4", "ti,sysc"; 118 compatible = "ti,sysc-omap4", "ti,sysc"; 144 compatible = "ti,sysc-omap4", "ti,sysc"; 169 compatible = "ti,sysc-omap4", "ti,sysc"; 215 compatible = "ti,sysc-omap2", "ti,sysc"; 271 compatible = "ti,sysc-omap2", "ti,sysc"; 300 compatible = "ti,sysc-omap4", "ti,sysc"; 350 compatible = "ti,sysc-omap2", "ti,sysc"; 436 compatible = "ti,sysc-omap2", "ti,sysc"; 493 compatible = "ti,sysc-omap2", "ti,sysc"; [all …]
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A D | am33xx-l4.dtsi | 34 compatible = "ti,sysc-omap4", "ti,sysc"; 90 compatible = "ti,sysc-omap4", "ti,sysc"; 131 compatible = "ti,sysc-omap2", "ti,sysc"; 176 compatible = "ti,sysc-omap2", "ti,sysc"; 207 compatible = "ti,sysc-omap2", "ti,sysc"; 230 compatible = "ti,sysc-omap4", "ti,sysc"; 266 compatible = "ti,sysc-omap4", "ti,sysc"; 369 compatible = "ti,sysc-omap2", "ti,sysc"; 700 compatible = "ti,sysc-pruss", "ti,sysc"; 868 compatible = "ti,sysc-omap2", "ti,sysc"; [all …]
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A D | omap4-l4-abe.dtsi | 88 compatible = "ti,sysc-omap2", "ti,sysc"; 121 compatible = "ti,sysc-omap2", "ti,sysc"; 154 compatible = "ti,sysc-omap2", "ti,sysc"; 187 compatible = "ti,sysc-mcasp", "ti,sysc"; 221 compatible = "ti,sysc-omap4", "ti,sysc"; 252 compatible = "ti,sysc-omap2", "ti,sysc"; 280 compatible = "ti,sysc-omap4", "ti,sysc"; 314 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 344 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 374 compatible = "ti,sysc-omap4-timer", "ti,sysc"; [all …]
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A D | omap5-l4-abe.dtsi | 88 compatible = "ti,sysc-omap2", "ti,sysc"; 90 reg-names = "sysc"; 121 compatible = "ti,sysc-omap2", "ti,sysc"; 154 compatible = "ti,sysc-omap2", "ti,sysc"; 205 compatible = "ti,sysc-omap4", "ti,sysc"; 245 compatible = "ti,sysc-omap4", "ti,sysc"; 279 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 310 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 341 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 371 compatible = "ti,sysc-omap4-timer", "ti,sysc"; [all …]
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A D | omap4.dtsi | 176 compatible = "ti,sysc-omap4", "ti,sysc"; 201 compatible = "ti,sysc-omap2", "ti,sysc"; 230 compatible = "ti,sysc-omap4", "ti,sysc"; 281 compatible = "ti,sysc-omap2", "ti,sysc"; 310 compatible = "ti,sysc-omap2", "ti,sysc"; 393 compatible = "ti,sysc-omap4", "ti,sysc"; 422 compatible = "ti,sysc-omap2", "ti,sysc"; 447 compatible = "ti,sysc-omap2", "ti,sysc"; 480 compatible = "ti,sysc-omap2", "ti,sysc"; 507 compatible = "ti,sysc-omap2", "ti,sysc"; [all …]
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A D | omap5.dtsi | 8 #include <dt-bindings/bus/ti-sysc.h> 191 compatible = "ti,sysc-omap2", "ti,sysc"; 274 compatible = "ti,sysc-omap4", "ti,sysc"; 277 reg-names = "rev", "sysc"; 297 compatible = "ti,sysc-omap2", "ti,sysc"; 322 compatible = "ti,sysc-omap2", "ti,sysc"; 354 compatible = "ti,sysc-omap2", "ti,sysc"; 381 compatible = "ti,sysc-omap2", "ti,sysc"; 412 compatible = "ti,sysc-omap2", "ti,sysc"; 443 compatible = "ti,sysc-omap4", "ti,sysc"; [all …]
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A D | r8a77995.dtsi | 11 #include <dt-bindings/power/r8a77995-sysc.h> 33 power-domains = <&sysc R8A77995_PD_CA53_CPU0>; 40 power-domains = <&sysc R8A77995_PD_CA53_SCU>; 81 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 97 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 112 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 127 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 142 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 157 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 211 sysc: system-controller@e6180000 { label [all …]
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A D | r8a77980.dtsi | 12 #include <dt-bindings/power/r8a77980-sysc.h> 44 power-domains = <&sysc R8A77980_PD_CA53_CPU0>; 54 power-domains = <&sysc R8A77980_PD_CA53_CPU1>; 64 power-domains = <&sysc R8A77980_PD_CA53_CPU2>; 74 power-domains = <&sysc R8A77980_PD_CA53_CPU3>; 81 power-domains = <&sysc R8A77980_PD_CA53_SCU>; 142 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; 158 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; 327 sysc: system-controller@e6180000 { label 328 compatible = "renesas,r8a77980-sysc"; [all …]
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A D | omap36xx.dtsi | 11 #include <dt-bindings/bus/ti-sysc.h> 99 compatible = "ti,sysc-omap3630-sr", "ti,sysc"; 102 reg-names = "sysc"; 103 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 104 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 121 compatible = "ti,sysc-omap3630-sr", "ti,sysc"; 124 reg-names = "sysc"; 125 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 126 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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A D | r8a77970.dtsi | 12 #include <dt-bindings/power/r8a77970-sysc.h> 43 power-domains = <&sysc R8A77970_PD_CA53_CPU0>; 53 power-domains = <&sysc R8A77970_PD_CA53_CPU1>; 60 power-domains = <&sysc R8A77970_PD_CA53_SCU>; 112 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; 128 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; 143 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; 158 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; 297 sysc: system-controller@e6180000 { label 298 compatible = "renesas,r8a77970-sysc"; [all …]
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A D | r8a7792.dtsi | 11 #include <dt-bindings/power/r8a7792-sysc.h> 56 power-domains = <&sysc R8A7792_PD_CA15_CPU0>; 66 power-domains = <&sysc R8A7792_PD_CA15_CPU1>; 74 power-domains = <&sysc R8A7792_PD_CA15_SCU>; 114 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 130 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 145 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 160 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 175 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; 325 sysc: system-controller@e6180000 { label [all …]
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A D | am33xx.dtsi | 11 #include <dt-bindings/bus/ti-sysc.h> 209 compatible = "ti,sysc-omap4", "ti,sysc"; 236 compatible = "ti,sysc-omap4", "ti,sysc"; 239 reg-names = "rev", "sysc"; 259 compatible = "ti,sysc-omap4", "ti,sysc"; 262 reg-names = "rev", "sysc"; 282 compatible = "ti,sysc-omap4", "ti,sysc"; 285 reg-names = "rev", "sysc"; 604 compatible = "ti,sysc-omap3-sham", "ti,sysc"; 632 compatible = "ti,sysc-omap2", "ti,sysc"; [all …]
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A D | r8a774c0.dtsi | 10 #include <dt-bindings/power/r8a774c0-sysc.h> 77 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; 89 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; 98 power-domains = <&sysc R8A774C0_PD_CA53_SCU>; 149 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 165 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 180 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 195 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 349 sysc: system-controller@e6180000 { label 350 compatible = "renesas,r8a774c0-sysc"; [all …]
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A D | r8a77951.dtsi | 10 #include <dt-bindings/power/r8a7795-sysc.h> 155 power-domains = <&sysc R8A7795_PD_CA57_CPU0>; 170 power-domains = <&sysc R8A7795_PD_CA57_CPU1>; 184 power-domains = <&sysc R8A7795_PD_CA57_CPU2>; 583 sysc: system-controller@e6180000 { label 584 compatible = "renesas,r8a7795-sysc"; 1104 power-domains = <&sysc R8A7795_PD_A3IR>; 1169 power-domains = <&sysc R8A7795_PD_A3VC>; 1177 power-domains = <&sysc R8A7795_PD_A3VC>; 1201 power-domains = <&sysc R8A7795_PD_A3VP>; [all …]
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A D | r8a77990.dtsi | 10 #include <dt-bindings/power/r8a77990-sysc.h> 88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 100 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 109 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 176 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 374 sysc: system-controller@e6180000 { label 375 compatible = "renesas,r8a77990-sysc"; [all …]
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A D | r8a774e1.dtsi | 11 #include <dt-bindings/power/r8a774e1-sysc.h> 133 power-domains = <&sysc R8A774E1_PD_CA57_CPU0>; 148 power-domains = <&sysc R8A774E1_PD_CA57_CPU1>; 162 power-domains = <&sysc R8A774E1_PD_CA57_CPU2>; 242 power-domains = <&sysc R8A774E1_PD_CA57_SCU>; 556 sysc: system-controller@e6180000 { label 557 compatible = "renesas,r8a774e1-sysc"; 1152 power-domains = <&sysc R8A774E1_PD_A3VC>; 1160 power-domains = <&sysc R8A774E1_PD_A3VC>; 1184 power-domains = <&sysc R8A774E1_PD_A3VP>; [all …]
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A D | r8a77960.dtsi | 10 #include <dt-bindings/power/r8a7796-sysc.h> 160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 175 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 241 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 248 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 552 sysc: system-controller@e6180000 { label 553 compatible = "renesas,r8a7796-sysc"; 1019 power-domains = <&sysc R8A7796_PD_A3IR>; 1068 power-domains = <&sysc R8A7796_PD_A3VC>; 2517 power-domains = <&sysc R8A7796_PD_A3VC>; [all …]
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A D | r8a779a0.dtsi | 10 #include <dt-bindings/power/r8a779a0-sysc.h> 35 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; 41 power-domains = <&sysc R8A779A0_PD_A2E0D0>; 88 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 107 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 121 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 135 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 149 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 163 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 257 sysc: system-controller@e6180000 { label [all …]
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A D | r8a774b1.dtsi | 11 #include <dt-bindings/power/r8a774b1-sysc.h> 80 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; 93 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; 102 power-domains = <&sysc R8A774B1_PD_CA57_SCU>; 375 sysc: system-controller@e6180000 { label 376 compatible = "renesas,r8a774b1-sysc"; 947 power-domains = <&sysc R8A774B1_PD_A3VC>; 963 power-domains = <&sysc R8A774B1_PD_A3VP>; 2320 power-domains = <&sysc R8A774B1_PD_A3VP>; 2329 power-domains = <&sysc R8A774B1_PD_A3VP>; [all …]
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A D | r8a7790.dtsi | 13 #include <dt-bindings/power/r8a7790-sysc.h> 80 power-domains = <&sysc R8A7790_PD_CA15_CPU0>; 101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>; 122 power-domains = <&sysc R8A7790_PD_CA15_CPU2>; 164 power-domains = <&sysc R8A7790_PD_CA7_CPU0>; 175 power-domains = <&sysc R8A7790_PD_CA7_CPU1>; 186 power-domains = <&sysc R8A7790_PD_CA7_CPU2>; 197 power-domains = <&sysc R8A7790_PD_CA7_CPU3>; 211 power-domains = <&sysc R8A7790_PD_CA7_SCU>; 398 sysc: system-controller@e6180000 { label [all …]
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/u-boot-v2022.01-rc1/arch/mips/mach-mtmips/mt7628/ |
A D | init.c | 21 void __iomem *sysc; in set_init_timer_freq() local 24 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in set_init_timer_freq() 27 bs = readl(sysc + SYSCTL_SYSCFG0_REG); in set_init_timer_freq() 36 val = readl(sysc + SYSCTL_CLKCFG0_REG); in set_init_timer_freq() 50 void __iomem *sysc; in print_cpuinfo() local 57 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo() 59 val = readl(sysc + SYSCTL_CHIP_REV_ID_REG); in print_cpuinfo() 64 val = readl(sysc + SYSCTL_SYSCFG0_REG); in print_cpuinfo() 68 val = readl(sysc + SYSCTL_EFUSE_CFG_REG); in print_cpuinfo()
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A D | ddr.c | 67 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_memc_reset() local 70 setbits_32(sysc + SYSCTL_RSTCTL_REG, MC_RST); in mt7628_memc_reset() 72 clrbits_32(sysc + SYSCTL_RSTCTL_REG, MC_RST); in mt7628_memc_reset() 133 void __iomem *sysc; in mt7628_ddr_init() local 137 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_ddr_init() 138 ddr_type = readl(sysc + SYSCTL_SYSCFG0_REG) & DRAM_TYPE; in mt7628_ddr_init() 139 pkg_type = !!(readl(sysc + SYSCTL_CHIP_REV_ID_REG) & PKG_ID); in mt7628_ddr_init() 140 lspd = readl(sysc + SYSCTL_CLKCFG0_REG) & in mt7628_ddr_init()
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