| /lk-master/external/arch/arm/arm-m/CMSIS/Include/ |
| A D | cmsis_armclang_ltm.h | 258 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
263 return op1; in __ROR()
265 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1592 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) in __SASX() argument
1600 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) in __QASX() argument
1616 __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) in __UASX() argument
1640 __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) in __SSAX() argument
1718 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) in __UXTB16() argument
1722 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); in __UXTB16()
1734 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) in __SXTB16() argument
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| A D | cmsis_gcc.h | 349 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
354 return op1; in __ROR()
356 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1840 __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) in __SASX() argument
1848 __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) in __QASX() argument
1968 __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) in __UXTB16() argument
1972 __ASM ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); in __UXTB16()
1984 __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) in __SXTB16() argument
1988 __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); in __SXTB16()
1998 result = __SXTB16(__ROR(op1, rotate)) ; in __SXTB16_RORn()
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| A D | cmsis_armclang.h | 260 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
265 return op1; in __ROR()
267 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1491 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA() argument
1495 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); in __SMMLA()
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| A D | cmsis_iccarm.h | 648 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
650 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); in __ROR()
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| /lk-master/arch/arm/include/arch/ |
| A D | arm.h | 104 #define GEN_CP_REG_FUNCS(cp, reg, op1, c1, c2, op2) \ argument
107 __asm__ volatile("mrc " #cp ", " #op1 ", %0, " #c1 "," #c2 "," #op2 : "=r" (val)); \
113 __asm__("mrc " #cp ", " #op1 ", %0, " #c1 "," #c2 "," #op2 : "=r" (val)); \
118 __asm__ volatile("mcr " #cp ", " #op1 ", %0, " #c1 "," #c2 "," #op2 :: "r" (val)); \
123 __asm__ volatile("mcr " #cp ", " #op1 ", %0, " #c1 "," #c2 "," #op2 :: "r" (val)); \
126 #define GEN_CP15_REG_FUNCS(reg, op1, c1, c2, op2) \ argument
127 GEN_CP_REG_FUNCS(p15, reg, op1, c1, c2, op2)
129 #define GEN_CP14_REG_FUNCS(reg, op1, c1, c2, op2) \ argument
130 GEN_CP_REG_FUNCS(p14, reg, op1, c1, c2, op2)
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| /lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/ |
| A D | core_cmInstr.h | 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
463 return (op1 >> op2) | (op1 << (32 - op2)); in __ROR()
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