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/seL4-master/src/plat/pc99/machine/
A Dintel-vtd.c145 for (i = 0; i < x86KSnumDrhu; i++) { in invalidate_context_cache()
179 for (i = 0; i < x86KSnumDrhu; i++) { in invalidate_iotlb()
263 for (i = 0; i < x86KSnumDrhu; i++) { in vtd_handle_fault()
288 for (word_t i = 1; i < rmrr_list->num; i++) { in vtd_get_n_paging() local
298 for (word_t i = x86KSnumIOPTLevels - 1; i > 0; i--) { in vtd_get_n_paging() local
321 int i; in vtd_map_reserved_page() local
343 for (i = x86KSnumIOPTLevels - 1; i >= 0; i--) { in vtd_map_reserved_page()
385 for (i = 0; i < rmrr_list->num; i++) { in vtd_create_context_table()
400 for (i = 0; i < x86KSnumDrhu; i++) { in vtd_enable()
422 for (i = 0; i < x86KSnumDrhu; i++) { in vtd_enable()
[all …]
A Dhardware.c50 for (int i = 0; i < TSC_FREQ_RETRIES; i++) { in measure_tsc_khz() local
67 TSC_FREQ_RETRIES - i - 1); in measure_tsc_khz()
96 for (int i = 0; i < ARRAY_SIZE(valid_models); i++) { in tsc_init() local
97 if (model_info->model == valid_models[i]) { in tsc_init()
/seL4-master/src/arch/arm/machine/
A Dgic_v2.c45 word_t i; in infer_cpu_gic_id() local
47 for (i = 0; i < nirqs; i += 4) { in infer_cpu_gic_id()
64 word_t i; in dist_init() local
68 for (i = 0; i < nirqs; i += 32) { in dist_init()
76 for (i = 32; i < nirqs; i += 4) { in dist_init()
89 for (i = 0; i < nirqs; i += 4) { in dist_init()
94 for (i = 64; i < nirqs; i += 32) { in dist_init()
99 for (i = 0; i < nirqs; i += 32) { in dist_init()
112 uint32_t i; in cpu_iface_init() local
128 for (i = 0; i < 16; i += 4) { in cpu_iface_init()
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A Ddebug.c366 for (i = 0; i < nBp; i++) { in dumpBpsAndWpsCp()
370 for (i = 0; i < nWp; i++) { in dumpBpsAndWpsCp()
387 for (i = 0; i < nBp; i++) { in dumpBpsAndWpsContext()
391 for (i = 0; i < nWp; i++) { in dumpBpsAndWpsContext()
773 for (i = 0; i < seL4_NumExclusiveBreakpoints; i++) { in disableAllBpsAndWps()
777 for (i = 0; i < seL4_NumExclusiveWatchpoints; i++) { in disableAllBpsAndWps()
1178 for (i = 0; i < seL4_NumExclusiveBreakpoints; i++) { in loadAllDisabledBreakpointState()
1181 for (i = 0; i < seL4_NumExclusiveWatchpoints; i++) { in loadAllDisabledBreakpointState()
1210 for (i = 0; i < seL4_NumExclusiveBreakpoints; i++) { in saveAllBreakpointState()
1215 for (i = 0; i < seL4_NumExclusiveWatchpoints; i++) { in saveAllBreakpointState()
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A Dgic_v3.c138 word_t i; in dist_init() local
153 for (i = SPI_START; i < nr_lines; i += 16) { in dist_init()
160 for (i = SPI_START; i < nr_lines; i += 4) { in dist_init()
164 for (i = SPI_START; i < nr_lines; i += 32) { in dist_init()
175 for (i = SPI_START; i < nr_lines; i++) { in dist_init()
236 int i; in gicr_init() local
248 for (i = 0; i < SPI_START; i += 4) { in gicr_init()
353 for (word_t i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in ipi_send_target() local
354 sgi1r[i] = 0; in ipi_send_target()
368 for (word_t i = 0; i <= last_aff1; i++) { in ipi_send_target() local
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/seL4-master/src/machine/
A Dprofiler.c44 word_t i; in profiler_reset() local
46 for (i = 0; i < MAX_UNIQUE_CHECKPOINTS; i++) { in profiler_reset()
47 profiler_entries[i].pc = 0; in profiler_reset()
48 profiler_entries[i].count = 0; in profiler_reset()
55 unsigned int samples, i, count; in profiler_list() local
61 for (i = 0; i <= max_checkpoint; i++) { in profiler_list()
63 printf("%u %u\n", i, (unsigned int)profiler_entries[i].count); in profiler_list()
89 for (word_t i = 0; i < MAX_UNIQUE_INSTRUCTIONS; i++) { in profiler_reset() local
90 profiler_entries[i].pc = 0; in profiler_reset()
91 profiler_entries[i].count = 0; in profiler_reset()
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A Dio.c186 word_t i; member
288 int i; in getint() local
290 if (i > INT_MAX / 10U || DIGIT(**s) > INT_MAX - 10 * i) { in getint()
291 i = -1; in getint()
293 i = 10 * i + DIGIT(**s); in getint()
296 return i; in getint()
308 word_t i; in printf_core() local
506 arg.i = -arg.i; in printf_core()
561 for (i = 1; i <= NL_ARGMAX && nl_type[i]; i++) { in printf_core()
562 pop_arg(nl_arg + i, nl_type[i], ap); in printf_core()
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A Dcapdl.c46 for (int i = 0; i < watermark; i++) { in seen() local
47 if (same_cap(seen_list[i], c)) { in seen()
180 for (uint32_t i = 0; i < (1 << radix); i++) { in obj_tcb_print_cnodes() local
181 lookupCapAndSlot_ret_t c = lookupCapAndSlot(tcb, i); in obj_tcb_print_cnodes()
307 for (uint32_t i = 0; i < (1 << radix); i++) { in obj_cnode_print_slots() local
308 lookupCapAndSlot_ret_t c = lookupCapAndSlot(tcb, i); in obj_cnode_print_slots()
310 printf("0x%x: ", i); in obj_cnode_print_slots()
316 for (uint32_t i = 0; i < (1 << radix); i++) { in obj_cnode_print_slots() local
330 for (unsigned i = 0; i <= maxIRQ; i++) { in obj_irq_print_maps() local
331 irq_t irq = CORE_IRQ_TO_IRQT(target, i); in obj_irq_print_maps()
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/seL4-master/src/kernel/
A Dboot.c55 for (i = 0; i < ndks_boot.resv_count; i++) { in reserve_region()
106 for (word_t i = 0; i < ARRAY_SIZE(ndks_boot.freemem); i++) { in insert_region() local
277 for (word_t i = 0; i < ksDomScheduleLength; i++) { in create_domain_cap() local
421 for (unsigned int i = 0; i < num_nodes; i++) { in init_sched_control() local
443 for (unsigned int i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in create_idle_thread() local
641 for (word_t i = 0; i < ndks_boot.resv_count; i++) { in create_untypeds() local
728 for (word_t i = 0; i < n_available; i++) { in check_available_memory() local
761 for (word_t i = 0; i < n_reserved; i++) { in check_reserved_memory() local
806 for (word_t i = 0; i < n_available; i++) { in init_freemem() local
877 for (; is_reg_empty(ndks_boot.freemem[i]) && i >= 0; i--); in init_freemem()
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/seL4-master/src/arch/x86/64/machine/
A Dcapdl.c105 for (word_t i = 0; i < BIT(PT_INDEX_OFFSET + PT_INDEX_BITS); i += (1UL << PT_INDEX_OFFSET)) { in x86_64_obj_pt_print_slots() local
123 for (word_t i = 0; i < BIT(PD_INDEX_OFFSET + PD_INDEX_BITS); i += (1UL << PD_INDEX_OFFSET)) { in x86_64_obj_pd_print_slots() local
146 …for (word_t i = 0; i < BIT(PDPT_INDEX_OFFSET + PDPT_INDEX_BITS); i += (1UL << PDPT_INDEX_OFFSET)) { in x86_64_obj_pdpt_print_slots() local
166 …for (word_t i = 0; i < BIT(PML4_INDEX_OFFSET + PML4_INDEX_BITS); i += (1UL << PML4_INDEX_OFFSET)) { in x86_64_obj_pml4_print_slots() local
386 for (word_t i = 0; i < BIT(PT_INDEX_OFFSET + PT_INDEX_BITS); i += (1UL << PT_INDEX_OFFSET)) { in x86_64_cap_pt_print_slots() local
402 for (word_t i = 0; i < BIT(PD_INDEX_OFFSET + PD_INDEX_BITS); i += (1UL << PD_INDEX_OFFSET)) { in x86_64_cap_pd_print_slots() local
415 for (word_t i = 0; i < BIT(PD_INDEX_OFFSET + PD_INDEX_BITS); i += (1UL << PD_INDEX_OFFSET)) { in x86_64_cap_pd_print_slots() local
428 …for (word_t i = 0; i < BIT(PDPT_INDEX_OFFSET + PDPT_INDEX_BITS); i += (1UL << PDPT_INDEX_OFFSET)) { in x86_64_cap_pdpt_print_slots() local
442 …for (word_t i = 0; i < BIT(PDPT_INDEX_OFFSET + PDPT_INDEX_BITS); i += (1UL << PDPT_INDEX_OFFSET)) { in x86_64_cap_pdpt_print_slots() local
454 …for (word_t i = 0; i < BIT(PML4_INDEX_OFFSET + PML4_INDEX_BITS); i += (1UL << PML4_INDEX_OFFSET)) { in x86_64_cap_pml4_print_slots() local
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/seL4-master/src/arch/arm/64/machine/
A Dcapdl.c182 for (word_t i = 0; i < BIT(PT_INDEX_OFFSET + PT_INDEX_BITS); i += (1 << PT_INDEX_OFFSET)) { in arm64_cap_pt_print_slots() local
199 for (word_t i = 0; i < BIT(PD_INDEX_OFFSET + PD_INDEX_BITS); i += (1 << PD_INDEX_OFFSET)) { in arm64_cap_pd_print_slots() local
217 for (word_t i = 0; i < BIT(PD_INDEX_OFFSET + PD_INDEX_BITS); i += (1 << PD_INDEX_OFFSET)) { in arm64_cap_pd_print_slots() local
235 for (word_t i = 0; i < BIT(PUD_INDEX_OFFSET + UPUD_INDEX_BITS); i += (1 << PUD_INDEX_OFFSET)) { in arm64_cap_pud_print_slots() local
244 for (word_t i = 0; i < BIT(PUD_INDEX_OFFSET + UPUD_INDEX_BITS); i += (1 << PUD_INDEX_OFFSET)) { in arm64_cap_pud_print_slots() local
266 … for (word_t i = 0; i < BIT(PGD_INDEX_OFFSET + PGD_INDEX_BITS); i += (1UL << PGD_INDEX_OFFSET)) { in obj_vtable_print_slots() local
274 … for (word_t i = 0; i < BIT(PGD_INDEX_OFFSET + PGD_INDEX_BITS); i += (1UL << PGD_INDEX_OFFSET)) { in obj_vtable_print_slots() local
453 for (word_t i = 0; i < BIT(PT_INDEX_OFFSET + PT_INDEX_BITS); i += (1 << PT_INDEX_OFFSET)) { in arm64_obj_pt_print_slots() local
470 for (word_t i = 0; i < BIT(PD_INDEX_OFFSET + PD_INDEX_BITS); i += (1 << PD_INDEX_OFFSET)) { in arm64_obj_pd_print_slots() local
493 for (word_t i = 0; i < BIT(PUD_INDEX_OFFSET + UPUD_INDEX_BITS); i += (1 << PUD_INDEX_OFFSET)) { in arm64_obj_pud_print_slots() local
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/seL4-master/src/arch/x86/32/kernel/
A Delf.c29 uint32_t i; in elf_getMemoryBounds() local
35 for (i = 0; i < elfFile->e_phnum; i++) { in elf_getMemoryBounds()
36 if (phdr[i].p_memsz > 0) { in elf_getMemoryBounds()
37 sect_start = phdr[i].p_vaddr; in elf_getMemoryBounds()
38 sect_end = sect_start + phdr[i].p_memsz; in elf_getMemoryBounds()
57 uint32_t i; in elf_load() local
60 for (i = 0; i < elfFile->e_phnum; i++) { in elf_load()
61 src = (paddr_t)elfFile + phdr[i].p_offset; in elf_load()
62 dst = phdr[i].p_vaddr + offset; in elf_load()
63 len = phdr[i].p_filesz; in elf_load()
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A Dvspace_32paging.c65 word_t i; in init_boot_pd() local
68 for (i = 0; i < (PPTR_BASE >> seL4_LargePageBits); i++) { in init_boot_pd()
69 *(_boot_pd + i) = pde_pde_large_new_phys( in init_boot_pd()
70 i << seL4_LargePageBits, /* physical address */ in init_boot_pd()
85 for (i = 0; i < ((-PPTR_BASE) >> seL4_LargePageBits); i++) { in init_boot_pd()
189 word_t i; in copyGlobalMappings() local
192 for (i = PPTR_BASE >> seL4_LargePageBits; i < BIT(PD_INDEX_BITS); i++) { in copyGlobalMappings()
193 newPD[i] = ia32KSGlobalPD[i]; in copyGlobalMappings()
355 int i; in Arch_userStackTrace() local
375 for (i = 0; i < CONFIG_USER_STACK_TRACE_LENGTH; i++) { in Arch_userStackTrace()
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/seL4-master/src/arch/x86/64/kernel/
A Delf.c27 uint32_t i; in elf_getMemoryBounds() local
33 for (i = 0; i < elf->e_phnum; i++) { in elf_getMemoryBounds()
34 if (phdr[i].p_memsz > 0) { in elf_getMemoryBounds()
35 sect_start = phdr[i].p_vaddr; in elf_getMemoryBounds()
36 sect_end = sect_start + phdr[i].p_memsz; in elf_getMemoryBounds()
54 uint32_t i; in elf_load() local
57 for (i = 0; i < elf->e_phnum; i++) { in elf_load()
58 src = (paddr_t)elf + phdr[i].p_offset; in elf_load()
59 dst = phdr[i].p_vaddr + offset; in elf_load()
60 len = phdr[i].p_filesz; in elf_load()
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/seL4-master/src/arch/arm/32/machine/
A Dcapdl.c121 word_t i = 0; in arm32_cap_pt_print_slots() local
135 printf("0x%lx: frame_%p_%04lu ", PT_INDEX(i), pte, PT_INDEX(i)); in arm32_cap_pt_print_slots()
142 printf("0x%lx: frame_%p_%04lu ", PT_INDEX(i), pte, PT_INDEX(i)); in arm32_cap_pt_print_slots()
163 word_t i = 0; in obj_vtable_print_slots() local
164 while (i < MAX_UL) { in obj_vtable_print_slots()
181 printf("0x%lx: frame_%p_%04lu ", PD_INDEX(i), pde, PD_INDEX(i)); in obj_vtable_print_slots()
187 printf("0x%lx: pt_%p_%04lu\n", PD_INDEX(i), pde, PD_INDEX(i)); in obj_vtable_print_slots()
202 i = 0; in obj_vtable_print_slots()
204 while (i < MAX_UL) { in obj_vtable_print_slots()
410 word_t i = 0; in arm32_obj_pt_print_slots() local
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/seL4-master/src/api/
A Dfaults.c33 word_t i; in setMRs_lookup_failure() local
49 return i; in setMRs_lookup_failure()
76 word_t i; in copyMRsFaultReply() local
81 for (i = 0; i < MIN(length, n_msgRegisters); i++) { in copyMRsFaultReply()
87 if (i < length) { in copyMRsFaultReply()
90 for (; i < length; i++) { in copyMRsFaultReply()
102 word_t i; in copyMRsFault() local
103 for (i = 0; i < MIN(length, n_msgRegisters); i++) { in copyMRsFault()
104 setRegister(receiver, msgRegisters[i], getRegister(sender, fault_messages[id][i])); in copyMRsFault()
108 for (; i < length; i++) { in copyMRsFault()
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/seL4-master/include/arch/riscv/arch/
A Dmachine.h86 for (int i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in ifence() local
87 if (i != getCurrentCPUIndex()) { in ifence()
88 mask |= BIT(cpuIndexToID(i)); in ifence()
100 for (int i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in sfence() local
101 if (i != getCurrentCPUIndex()) { in sfence()
102 mask |= BIT(cpuIndexToID(i)); in sfence()
118 for (int i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in hwASIDFlush() local
119 if (i != getCurrentCPUIndex()) { in hwASIDFlush()
120 mask |= BIT(cpuIndexToID(i)); in hwASIDFlush()
/seL4-master/include/arch/x86/arch/kernel/
A Dtlb_bitmap.h20 for (int i = 0; i < TLBBITMAP_ROOT_ENTRIES; i++) { in tlb_bitmap_init() local
21 root[TLBBITMAP_ROOT_INDEX + i] = x86_make_empty_root_mapping(); in tlb_bitmap_init()
41 for (int i = 0; i < TLBBITMAP_ROOT_ENTRIES; i++) { in tlb_bitmap_get() local
42 word_t entry = root[TLBBITMAP_ROOT_INDEX + i].words[0]; in tlb_bitmap_get()
46 int shift = i * TLBBITMAP_ENTRIES_PER_ROOT; in tlb_bitmap_get()
/seL4-master/libsel4/include/sel4/
A Dfunctions.h46 LIBSEL4_INLINE_FUNC seL4_Word seL4_GetMR(int i) in seL4_GetMR() argument
48 return seL4_GetIPCBuffer()->msg[i]; in seL4_GetMR()
51 LIBSEL4_INLINE_FUNC void seL4_SetMR(int i, seL4_Word mr) in seL4_SetMR() argument
53 seL4_GetIPCBuffer()->msg[i] = mr; in seL4_SetMR()
66 LIBSEL4_INLINE_FUNC seL4_Word seL4_GetBadge(int i) in seL4_GetBadge() argument
68 return seL4_GetIPCBuffer()->caps_or_badges[i]; in seL4_GetBadge()
71 LIBSEL4_INLINE_FUNC seL4_CPtr seL4_GetCap(int i) in seL4_GetCap() argument
73 return (seL4_CPtr)seL4_GetIPCBuffer()->caps_or_badges[i]; in seL4_GetCap()
76 LIBSEL4_INLINE_FUNC void seL4_SetCap(int i, seL4_CPtr cptr) in seL4_SetCap() argument
78 seL4_GetIPCBuffer()->caps_or_badges[i] = (seL4_Word)cptr; in seL4_SetCap()
/seL4-master/include/drivers/irq/
A Driscv_plic0.h158 for (int i = 1; i <= PLIC_NUM_INTERRUPTS; i++) { in plic_init_hart() local
160 plic_mask_irq(true, i); in plic_init_hart()
170 for (int i = 1; i <= PLIC_NUM_INTERRUPTS; i++) { in plic_init_controller() local
172 if (plic_pending_interrupt(i)) { in plic_init_controller()
174 writel(i, PLIC_PPTR_BASE + plic_claim_offset(PLIC_HART_ID, PLIC_SVC_CONTEXT)); in plic_init_controller()
179 for (int i = 1; i <= PLIC_MAX_IRQ + 1; i++) { in plic_init_controller() local
180 writel(2, PLIC_PPTR_BASE + PLIC_PRIO + PLIC_PRIO_PER_ID * i); in plic_init_controller()
/seL4-master/src/arch/x86/kernel/
A Dboot.c33 irq_t i; in init_irqs() local
35 for (i = 0; i <= maxIRQ; i++) { in init_irqs()
36 if (i == irq_timer) { in init_irqs()
37 setIRQState(IRQTimer, i); in init_irqs()
39 } else if (i == irq_remote_call_ipi || i == irq_reschedule_ipi) { in init_irqs()
40 setIRQState(IRQIPI, i); in init_irqs()
43 } else if (i == irq_iommu) { in init_irqs()
44 setIRQState(IRQReserved, i); in init_irqs()
48 setIRQState(IRQReserved, i); in init_irqs()
49 } else if (i >= irq_isa_min && i <= irq_isa_max) { in init_irqs()
[all …]
/seL4-master/include/32/mode/api/
A Dipc_buffer.h13 static inline time_t mode_parseTimeArg(word_t i, word_t *buffer) in mode_parseTimeArg() argument
15 return (((time_t) getSyscallArg(i + 1, buffer) << 32llu) + getSyscallArg(i, buffer)); in mode_parseTimeArg()
18 static inline word_t mode_setTimeArg(word_t i, time_t time, word_t *buffer, tcb_t *thread) in mode_setTimeArg() argument
20 setMR(thread, buffer, i, (uint32_t) time); in mode_setTimeArg()
21 return setMR(thread, buffer, i + 1, (uint32_t)(time >> 32llu)); in mode_setTimeArg()
/seL4-master/src/smp/
A Dlock.c16 for (int i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in clh_lock_init() local
17 big_kernel_lock.node_owners[i].node = &big_kernel_lock.nodes[i]; in clh_lock_init()
/seL4-master/include/arch/riscv/arch/model/
A Dsmp.h31 word_t i = 0; in hartIDToCoreID() local
32 for (i = 0; i < CONFIG_MAX_NUM_NODES; i++) { in hartIDToCoreID()
33 if (coreMap.map[i] == hart_id) { in hartIDToCoreID()
37 return i; in hartIDToCoreID()
/seL4-master/src/object/
A Dtcb.c397 for (i = 0; i < length; i++) { in lookupExtraCaps()
422 for (i = 0; i < n && i < n_msgRegisters; i++) { in copyMRs()
432 for (; i < n; i++) { in copyMRs()
433 recvBuf[i + 1] = sendBuf[i + 1]; in copyMRs()
1880 for (i = 0; i < n_frameRegisters; i++) { in invokeTCB_CopyRegisters()
1893 for (i = 0; i < n_gpRegisters; i++) { in invokeTCB_CopyRegisters()
1941 for (i = 0; i < n && i < n_frameRegisters && i < n_msgRegisters; i++) { in invokeTCB_ReadRegisters()
1947 for (; i < n && i < n_frameRegisters; i++) { in invokeTCB_ReadRegisters()
1954 for (i = 0; i < n_gpRegisters && i + n_frameRegisters < n in invokeTCB_ReadRegisters()
1995 for (i = 0; i < n_frameRegisters && i < n; i++) { in invokeTCB_WriteRegisters()
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