1#include <k_config.h> 2 3/****************************************************************************** 4@ EXTERN PARAMETERS 5@******************************************************************************/ 6.extern g_active_task 7.extern g_preferred_ready_task 8.extern krhino_stack_ovf_check 9.extern krhino_task_sched_stats_get 10 11/****************************************************************************** 12@ EXPORT FUNCTIONS 13@******************************************************************************/ 14.global cpu_intrpt_save 15.global cpu_intrpt_restore 16.global cpu_task_switch 17.global cpu_intrpt_switch 18.global cpu_first_task_start 19 20.global Mtspend_Handler 21.global _first_task_restore 22 23/****************************************************************************** 24@ EQUATES 25@******************************************************************************/ 26.equ MSTATUS_PRV1, 0x1880 /* Enable interrupts when returning from the handler.*/ 27.equ RISCV_MSTATUS_MIE, (1<<3) /*machine-level interrupt bit*/ 28.equ RISCV_MSTATUS_MPIE, (1<<7) /*machine-level pre interrupt bit*/ 29.equ RISCV_MSTATUS_MPP, (0x3<<11) /*machine-level MPP bit*/ 30 31#if __riscv_xlen == 64 32#define portWORD_SIZE 8 33#define store_x sd 34#define load_x ld 35#elif __riscv_xlen == 32 36#define store_x sw 37#define load_x lw 38#define portWORD_SIZE 4 39#else 40 #error Assembler did not define __riscv_xlen 41#endif 42 43/****************************************************************************** 44@ CODE GENERATION DIRECTIVES 45@*******************************************************************************/ 46.text 47.align 3 48 49/****************************************************************************** 50@ Functions: 51@ size_t cpu_intrpt_save(void); 52@ void cpu_intrpt_restore(size_t cpsr); 53@******************************************************************************/ 54cpu_intrpt_save: 55 csrrci a0, mstatus, RISCV_MSTATUS_MIE 56 ret 57 58 59cpu_intrpt_restore: 60 csrw mstatus, a0 61 ret 62 63 64/****************************************************************************** 65@ Functions: 66@ void cpu_intrpt_switch(void); 67@ void cpu_task_switch(void); 68@******************************************************************************/ 69cpu_task_switch: 70 lui t0, 0x40040 71 slli t0, t0,0x8 72 li t2, 0x1 73 sd t2, 0(t0) 74 ret 75 76 77cpu_intrpt_switch: 78 lui t0, 0x40040 79 slli t0, t0,0x8 80 li t2, 0x1 81 sd t2, 0(t0) 82 ret 83 84 85/****************************************************************************** 86@ Functions: 87@ void Mtspend_Handler(void); 88@******************************************************************************/ 89.align 8 90.func 91Mtspend_Handler: 92 csrc mstatus, 8 93 94 addi sp, sp, -(128+128) 95 fsd f31, (0 +0 )(sp) 96 fsd f30, (4 +4 )(sp) 97 fsd f29, (8 +8 )(sp) 98 fsd f28, (12 +12 )(sp) 99 fsd f27, (16 +16 )(sp) 100 fsd f26, (20 +20 )(sp) 101 fsd f25, (24 +24 )(sp) 102 fsd f24, (28 +28 )(sp) 103 fsd f23, (32 +32 )(sp) 104 fsd f22, (36 +36 )(sp) 105 fsd f21, (40 +40 )(sp) 106 fsd f20, (44 +44 )(sp) 107 fsd f19, (48 +48 )(sp) 108 fsd f18, (52 +52 )(sp) 109 fsd f17, (56 +56 )(sp) 110 fsd f16, (60 +60 )(sp) 111 fsd f15, (64 +64 )(sp) 112 fsd f14, (68 +68 )(sp) 113 fsd f13, (72 +72 )(sp) 114 fsd f12, (76 +76 )(sp) 115 fsd f11, (80 +80 )(sp) 116 fsd f10, (84 +84 )(sp) 117 fsd f9, (88 +88 )(sp) 118 fsd f8, (92 +92 )(sp) 119 fsd f7, (96 +96 )(sp) 120 fsd f6, (100+100)(sp) 121 fsd f5, (104+104)(sp) 122 fsd f4, (108+108)(sp) 123 fsd f3, (112+112)(sp) 124 fsd f2, (116+116)(sp) 125 fsd f1, (120+120)(sp) 126 fsd f0, (124+124)(sp) 127 128 addi sp, sp, -(124+124) 129 130 sd x1, (0 +0 )(sp) 131 sd x3, (4 +4 )(sp) 132 sd x4, (8 +8 )(sp) 133 sd x5, (12 +12 )(sp) 134 sd x6, (16 +16 )(sp) 135 sd x7, (20 +20 )(sp) 136 sd x8, (24 +24 )(sp) 137 sd x9, (28 +28 )(sp) 138 sd x10, (32 +32 )(sp) 139 sd x11, (36 +36 )(sp) 140 sd x12, (40 +40 )(sp) 141 sd x13, (44 +44 )(sp) 142 sd x14, (48 +48 )(sp) 143 sd x15, (52 +52 )(sp) 144 sd x16, (56 +56 )(sp) 145 sd x17, (60 +60 )(sp) 146 sd x18, (64 +64 )(sp) 147 sd x19, (68 +68 )(sp) 148 sd x20, (72 +72 )(sp) 149 sd x21, (76 +76 )(sp) 150 sd x22, (80 +80 )(sp) 151 sd x23, (84 +84 )(sp) 152 sd x24, (88 +88 )(sp) 153 sd x25, (92 +92 )(sp) 154 sd x26, (96 +96 )(sp) 155 sd x27, (100+100)(sp) 156 sd x28, (104+104)(sp) 157 sd x29, (108+108)(sp) 158 sd x30, (112+112)(sp) 159 sd x31, (116+116)(sp) 160 csrr t0, mepc 161 sd t0, (120+120)(sp) 162 /* g_active_task->task_stack = context region */ 163 la a1, g_active_task 164 ld a1, (a1) 165 sd sp, (a1) 166 167#if (RHINO_CONFIG_TASK_STACK_OVF_CHECK > 0) 168 call krhino_stack_ovf_check 169#endif 170#if (RHINO_CONFIG_SYS_STATS > 0) 171 call krhino_task_sched_stats_get 172#endif 173 174_Mtspend_Handler_nosave: 175 /* R0 = g_active_task->task_stack = context region */ 176 la a0, g_active_task 177 la a1, g_preferred_ready_task 178 ld a2, (a1) 179 sd a2, (a0) 180 181 la a1, g_active_task 182 ld a1, (a1) 183 ld sp, (a1) 184 185 /* clear Mtspend irq */ 186 lui t0, 0x40040 187 slli t0, t0,0x8 188 li t2, 0x0 189 sd t2, 0(t0) 190 191 /* Run in machine mode */ 192 li t0, MSTATUS_PRV1 193 csrs mstatus, t0 194 195 ld t0, (120+120)(sp) 196 csrw mepc, t0 197 198 ld x1, (0 +0 )(sp) 199 ld x3, (4 +4 )(sp) 200 ld x4, (8 +8 )(sp) 201 ld x5, (12 +12 )(sp) 202 ld x6, (16 +16 )(sp) 203 ld x7, (20 +20 )(sp) 204 ld x8, (24 +24 )(sp) 205 ld x9, (28 +28 )(sp) 206 ld x10, (32 +32 )(sp) 207 ld x11, (36 +36 )(sp) 208 ld x12, (40 +40 )(sp) 209 ld x13, (44 +44 )(sp) 210 ld x14, (48 +48 )(sp) 211 ld x15, (52 +52 )(sp) 212 ld x16, (56 +56 )(sp) 213 ld x17, (60 +60 )(sp) 214 ld x18, (64 +64 )(sp) 215 ld x19, (68 +68 )(sp) 216 ld x20, (72 +72 )(sp) 217 ld x21, (76 +76 )(sp) 218 ld x22, (80 +80 )(sp) 219 ld x23, (84 +84 )(sp) 220 ld x24, (88 +88 )(sp) 221 ld x25, (92 +92 )(sp) 222 ld x26, (96 +96 )(sp) 223 ld x27, (100+100)(sp) 224 ld x28, (104+104)(sp) 225 ld x29, (108+108)(sp) 226 ld x30, (112+112)(sp) 227 ld x31, (116+116)(sp) 228 229 addi sp, sp, (124+124) 230 231 fld f31,( 0 + 0 )(sp) 232 fld f30,( 4 + 4 )(sp) 233 fld f29,( 8 + 8 )(sp) 234 fld f28,( 12+ 12)(sp) 235 fld f27,( 16+ 16)(sp) 236 fld f26,( 20+ 20)(sp) 237 fld f25,( 24+ 24)(sp) 238 fld f24,( 28+ 28)(sp) 239 fld f23,( 32+ 32)(sp) 240 fld f22,( 36+ 36)(sp) 241 fld f21,( 40+ 40)(sp) 242 fld f20,( 44+ 44)(sp) 243 fld f19,( 48+ 48)(sp) 244 fld f18,( 52+ 52)(sp) 245 fld f17,( 56+ 56)(sp) 246 fld f16,( 60+ 60)(sp) 247 fld f15,( 64+ 64)(sp) 248 fld f14,( 68+ 68)(sp) 249 fld f13,( 72+ 72)(sp) 250 fld f12,( 76+ 76)(sp) 251 fld f11,( 80+ 80)(sp) 252 fld f10,( 84+ 84)(sp) 253 fld f9, ( 88+ 88)(sp) 254 fld f8, ( 92+ 92)(sp) 255 fld f7, ( 96+ 96)(sp) 256 fld f6, (100+100)(sp) 257 fld f5, (104+104)(sp) 258 fld f4, (108+108)(sp) 259 fld f3, (112+112)(sp) 260 fld f2, (116+116)(sp) 261 fld f1, (120+120)(sp) 262 fld f0, (124+124)(sp) 263 264 addi sp, sp, (128+128) 265// csrrw sp, mscratch, sp 266 267 mret 268 .endfunc 269 270 271/****************************************************************************** 272@ Functions: 273@ void cpu_first_task_start(void); 274@******************************************************************************/ 275.align 8 276.func 277cpu_first_task_start: 278 /* Enable mtime and external interrupts. 1<<7 for timer interrupt, 1<<11 279 for external interrupt. */ 280 li t0, 0x888 281 csrw mie, t0 282 283 la a0, g_active_task 284 ld a0, (a0) 285 ld sp, (a0) 286 287 /* Run in machine mode */ 288 li t0, MSTATUS_PRV1 289 csrs mstatus, t0 290 291 ld t0, (120+120)(sp) 292 csrw mepc, t0 293 294 ld x1, (0 +0 )(sp) 295 ld x3, (4 +4 )(sp) 296 ld x4, (8 +8 )(sp) 297 ld x5, (12 +12 )(sp) 298 ld x6, (16 +16 )(sp) 299 ld x7, (20 +20 )(sp) 300 ld x8, (24 +24 )(sp) 301 ld x9, (28 +28 )(sp) 302 ld x10, (32 +32 )(sp) 303 ld x11, (36 +36 )(sp) 304 ld x12, (40 +40 )(sp) 305 ld x13, (44 +44 )(sp) 306 ld x14, (48 +48 )(sp) 307 ld x15, (52 +52 )(sp) 308 ld x16, (56 +56 )(sp) 309 ld x17, (60 +60 )(sp) 310 ld x18, (64 +64 )(sp) 311 ld x19, (68 +68 )(sp) 312 ld x20, (72 +72 )(sp) 313 ld x21, (76 +76 )(sp) 314 ld x22, (80 +80 )(sp) 315 ld x23, (84 +84 )(sp) 316 ld x24, (88 +88 )(sp) 317 ld x25, (92 +92 )(sp) 318 ld x26, (96 +96 )(sp) 319 ld x27, (100+100)(sp) 320 ld x28, (104+104)(sp) 321 ld x29, (108+108)(sp) 322 ld x30, (112+112)(sp) 323 ld x31, (116+116)(sp) 324 325 addi sp, sp, (124+124) 326 327 fld f31, (0 +0 )(sp) 328 fld f30, (4 +4 )(sp) 329 fld f29, (8 +8 )(sp) 330 fld f28, (12 +12 )(sp) 331 fld f27, (16 +16 )(sp) 332 fld f26, (20 +20 )(sp) 333 fld f25, (24 +24 )(sp) 334 fld f24, (28 +28 )(sp) 335 fld f23, (32 +32 )(sp) 336 fld f22, (36 +36 )(sp) 337 fld f21, (40 +40 )(sp) 338 fld f20, (44 +44 )(sp) 339 fld f19, (48 +48 )(sp) 340 fld f18, (52 +52 )(sp) 341 fld f17, (56 +56 )(sp) 342 fld f16, (60 +60 )(sp) 343 fld f15, (64 +64 )(sp) 344 fld f14, (68 +68 )(sp) 345 fld f13, (72 +72 )(sp) 346 fld f12, (76 +76 )(sp) 347 fld f11, (80 +80 )(sp) 348 fld f10, (84 +84 )(sp) 349 fld f9, (88 +88 )(sp) 350 fld f8, (92 +92 )(sp) 351 fld f7, (96 +96 )(sp) 352 fld f6, (100+100)(sp) 353 fld f5, (104+104)(sp) 354 fld f4, (108+108)(sp) 355 fld f3, (112+112)(sp) 356 fld f2, (116+116)(sp) 357 fld f1, (120+120)(sp) 358 fld f0, (124+124)(sp) 359 360 addi sp, sp, (128+128) 361 362 mret 363 .endfunc 364 365