1 /*
2  * Copyright (C) 2015-2020 Alibaba Group Holding Limited
3  */
4 #ifndef __HAL_I2C_H__
5 #define __HAL_I2C_H__
6 
7 #ifdef __cplusplus
8 extern "C" {
9 #endif
10 
11 #include "plat_types.h"
12 #include "hal_gpio.h"
13 #include "hal_sensor_eng.h"
14 
15 // For 10-bit address devices: OR the following mask with the real address
16 #define HAL_I2C_10BITADDR_MASK              (1 << 15)
17 
18 enum HAL_I2C_ACTION_AFTER_WRITE_T {
19     HAL_I2C_STOP_AFTER_WRITE = 0,
20     HAL_I2C_RESTART_AFTER_WRITE,
21 };
22 
23 enum HAL_I2C_ID_T {
24     HAL_I2C_ID_0 = 0,
25 #if (CHIP_HAS_I2C > 1)
26     HAL_I2C_ID_1,
27 #endif
28 
29     HAL_I2C_ID_NUM,
30 };
31 
32 enum HAL_I2C_API_MODE_T {
33     HAL_I2C_API_MODE_TASK = 0,
34     HAL_I2C_API_MODE_SIMPLE,
35     HAL_I2C_API_MODE_SENSOR_ENGINE,
36 };
37 
38 enum HAL_I2C_INT_STATUS_T {
39     HAL_I2C_INT_STATUS_GEN_CALL_MASK = 0x1<<11,
40     HAL_I2C_INT_STATUS_START_DET_MASK = 0x1<<10,
41     HAL_I2C_INT_STATUS_STOP_DET_MASK = 0x1<<9,
42     HAL_I2C_INT_STATUS_ACTIVITY_MASK = 0x1<<8,
43     HAL_I2C_INT_STATUS_RX_DONE_MASK = 0x1<<7,
44     HAL_I2C_INT_STATUS_TX_ABRT_MASK = 0x1<<6,
45     HAL_I2C_INT_STATUS_RD_REQ_MASK = 0x1<<5,
46     HAL_I2C_INT_STATUS_TX_EMPTY_MASK = 0x1<<4,
47     HAL_I2C_INT_STATUS_TX_OVER_MASK = 0x1<<3,
48     HAL_I2C_INT_STATUS_RX_FULL_MASK = 0x1<<2,
49     HAL_I2C_INT_STATUS_RX_OVER_MASK = 0x1<<1,
50     HAL_I2C_INT_STATUS_RX_UNDER_MASK = 0x1<<0,
51     /* FIXME : same as i2cip definitions
52     #define I2CIP_INT_STATUS_GEN_CALL_SHIFT (11)
53     #define I2CIP_INT_STATUS_START_DET_SHIFT (10)
54     #define I2CIP_INT_STATUS_STOP_DET_SHIFT (9)
55     #define I2CIP_INT_STATUS_ACTIVITY_SHIFT (8)
56     #define I2CIP_INT_STATUS_RX_DONE_SHIFT  (7)
57     #define I2CIP_INT_STATUS_TX_ABRT_SHIFT (6)
58     #define I2CIP_INT_STATUS_RD_REQ_SHIFT (5)
59     #define I2CIP_INT_STATUS_TX_EMPTY_SHIFT (4)
60     #define I2CIP_INT_STATUS_TX_OVER_SHIFT (3)
61     #define I2CIP_INT_STATUS_RX_FULL_SHIFT (2)
62     #define I2CIP_INT_STATUS_RX_OVER_SHIFT (1)
63     #define I2CIP_INT_STATUS_RX_UNDER_SHIFT (0)
64      */
65 };
66 
67 enum HAL_I2C_ERRCODE_T {
68     HAL_I2C_ERRCODE_SLVRD_INTX      = 1<<15,
69     HAL_I2C_ERRCODE_SLV_ARBLOST     = 1<<14,
70     HAL_I2C_ERRCODE_SLVFLUSH_TXFIFO = 1<<13,
71     HAL_I2C_ERRCODE_ARB_LOST        = 1<<12,
72     HAL_I2C_ERRCODE_MASTER_DIS      = 1<<11,
73     HAL_I2C_ERRCODE_10B_RD_NORSTRT  = 1<<10,
74     HAL_I2C_ERRCODE_SBYTE_NORSTRT   = 1<<9,
75     HAL_I2C_ERRCODE_HS_NORSTRT      = 1<<8,
76     HAL_I2C_ERRCODE_SBYTE_ACKDET    = 1<<7,
77     HAL_I2C_ERRCODE_HS_ACKDET       = 1<<6,
78     HAL_I2C_ERRCODE_GCALL_READ      = 1<<5,
79     HAL_I2C_ERRCODE_GCALL_NOACK     = 1<<4,
80     HAL_I2C_ERRCODE_TXDATA_NOACK    = 1<<3,
81     HAL_I2C_ERRCODE_10ADDR2_NOACK   = 1<<2,
82     HAL_I2C_ERRCODE_10ADDR1_NOACK   = 1<<1,
83     HAL_I2C_ERRCODE_7B_ADDR_NOACK   = 1<<0,
84 
85     HAL_I2C_ERRCODE_INV_PARAM       = 1<<31,
86     HAL_I2C_ERRCODE_IN_USE          = 1<<30,
87     HAL_I2C_ERRCODE_FIFO_ERR        = 1<<29,
88     HAL_I2C_ERRCODE_SYNC_TIMEOUT    = 1<<28,
89     HAL_I2C_ERRCODE_ACT_TIMEOUT     = 1<<27,
90     HAL_I2C_ERRCODE_TFNF_TIMEOUT    = 1<<26,
91     HAL_I2C_ERRCODE_TFE_TIMEOUT     = 1<<25,
92     HAL_I2C_ERRCODE_RFNE_TIMEOUT    = 1<<24,
93 
94     /* FIXME : same as i2cip definitions
95     #define I2CIP_TX_ABRT_SOURCE_ABRT_SLVRD_INTX_SHIFT (15)
96     #define I2CIP_TX_ABRT_SOURCE_ABRT_SLV_ARBLOST_SHIFT (14)
97     #define I2CIP_TX_ABRT_SOURCE_ABRT_SLVFLUSH_TXFIFO_SHIFT (13)
98     #define I2CIP_TX_ABRT_SOURCE_ARB_LOST_SHIFT (12)
99     #define I2CIP_TX_ABRT_SOURCE_ABRT_MASTER_DIS_SHIFT (11)
100     #define I2CIP_TX_ABRT_SOURCE_ABRT_10B_RD_NORSTRT_SHIFT (10)
101     #define I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_NORSTRT_SHIFT (9)
102     #define I2CIP_TX_ABRT_SOURCE_ABRT_HS_NORSTRT_SHIFT (8)
103     #define I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_ACKDET_SHIFT (7)
104     #define I2CIP_TX_ABRT_SOURCE_ABRT_HS_ACKDET_SHIFT (6)
105     #define I2CIP_TX_ABRT_SOURCE_ABRT_GCALL_READ_SHIFT (5)
106     #define I2CIP_TX_ABRT_SOURCE_ABRT_GCALL_NOACK_SHIFT (4)
107     #define I2CIP_TX_ABRT_SOURCE_ABRT_TXDATA_NOACK_SHIFT (3)
108     #define I2CIP_TX_ABRT_SOURCE_ABRT_10ADDR2_NOACK_SHIFT (2)
109     #define I2CIP_TX_ABRT_SOURCE_ABRT_10ADDR1_NOACK_SHIFT (1)
110     #define I2CIP_TX_ABRT_SOURCE_ABRT_7B_ADDR_NOACK_SHIFT (0)
111     */
112 };
113 
114 struct HAL_I2C_CONFIG_T {
115     /* mode
116      SIMPLE_MODE : pulling when reading or writing (always sync), or use dma external;master or slave;only enable slave related irq;
117      TASK_MODE : task to driven reading or writing (sync or async, dma or non-dma);only master
118      */
119     enum HAL_I2C_API_MODE_T mode;
120 
121     uint8_t use_sync;
122     uint8_t use_dma;
123     uint8_t as_master;
124     uint32_t speed;
125     uint32_t addr_as_slave;
126 };
127 
128 typedef void (*HAL_I2C_SENSOR_ENG_HANDLER_T)(enum HAL_I2C_ID_T id, const uint8_t *buf, uint32_t len);
129 
130 struct HAL_I2C_SENSOR_ENGINE_CONFIG_T {
131     enum HAL_SENSOR_ENGINE_ID_T id;
132     enum HAL_SENSOR_ENGINE_TRIGGER_T trigger_type;
133     enum HAL_GPIO_PIN_T trigger_gpio;
134     uint32_t period_us;
135     uint16_t target_addr;
136     uint8_t *write_buf;
137     uint16_t write_txn_len;
138     uint8_t *read_buf;
139     uint16_t read_txn_len;
140     uint16_t txn_cnt;
141     uint8_t read_burst_cnt;
142     HAL_I2C_SENSOR_ENG_HANDLER_T handler;
143 };
144 
145 struct HAL_GPIO_I2C_CONFIG_T {
146     enum HAL_GPIO_PIN_T scl;
147     enum HAL_GPIO_PIN_T sda;
148     uint32_t speed;
149 };
150 
151 uint32_t hal_i2c_open(enum HAL_I2C_ID_T id, const struct HAL_I2C_CONFIG_T *cfg);
152 uint32_t hal_i2c_close(enum HAL_I2C_ID_T id);
153 uint32_t hal_i2c_reopen(enum HAL_I2C_ID_T id, const struct HAL_I2C_CONFIG_T *cfg);
154 
155 /* for master task mode */
156 typedef void (*HAL_I2C_TRANSFER_HANDLER_T)(enum HAL_I2C_ID_T id, uint32_t transfer_id,
157                                             const uint8_t *tx_buf, uint32_t tx_len,
158                                             const uint8_t *rx_buf, uint32_t rx_len,
159                                             enum HAL_I2C_ERRCODE_T errcode);
160 uint32_t hal_i2c_send(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf, uint32_t reg_len, uint32_t value_len,
161         uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);
162 uint32_t hal_i2c_recv(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf, uint32_t reg_len, uint32_t value_len,
163         uint8_t restart_after_write, uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);
164 // New I2C task mode APIs
165 uint32_t hal_i2c_task_send(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len,
166         uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);
167 uint32_t hal_i2c_task_recv(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len,
168         uint8_t *rx_buf, uint16_t rx_len,
169         uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);
170 uint32_t hal_i2c_task_msend(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_item_len,
171         uint16_t item_cnt, uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);
172 uint32_t hal_i2c_task_mrecv(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_item_len,
173         uint8_t *rx_buf, uint16_t rx_item_len, uint16_t item_cnt,
174         uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);
175 /* for master task mode end */
176 
177 /* for slave and simple master mode */
178 typedef void (*HAL_I2C_INT_HANDLER_T)(enum HAL_I2C_ID_T id, enum HAL_I2C_INT_STATUS_T status, uint32_t errocode);
179 uint32_t hal_i2c_slv_write(enum HAL_I2C_ID_T id, uint8_t *buf, uint32_t buf_len, uint32_t *act_len);
180 uint32_t hal_i2c_slv_read(enum HAL_I2C_ID_T id, uint8_t *buf, uint32_t buf_len, uint32_t *act_len);
181 uint32_t hal_i2c_set_interrupt_handler(enum HAL_I2C_ID_T id, HAL_I2C_INT_HANDLER_T handler);
182 uint32_t hal_i2c_mst_write(enum HAL_I2C_ID_T id, uint32_t device_addr, const uint8_t *buf, uint32_t buf_len, uint32_t *act_len, uint32_t restart, uint32_t stop, uint32_t yield);
183 uint32_t hal_i2c_mst_read(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf, uint32_t buf_len, uint32_t *act_len, uint32_t restart, uint32_t stop, uint32_t yield);
184 // New I2C simple mode APIs
185 uint32_t hal_i2c_simple_send(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len);
186 uint32_t hal_i2c_simple_recv(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len, uint8_t *rx_buf, uint16_t rx_len);
187 /* for slave and simple master mode end */
188 
189 /* sensor engine mode */
190 uint32_t hal_i2c_sensor_engine_start(enum HAL_I2C_ID_T id, const struct HAL_I2C_SENSOR_ENGINE_CONFIG_T *cfg);
191 uint32_t hal_i2c_sensor_engine_stop(enum HAL_I2C_ID_T id);
192 /* sensor engine end */
193 
194 int hal_gpio_i2c_open(const struct HAL_GPIO_I2C_CONFIG_T *cfg);
195 int hal_gpio_i2c_close(void);
196 uint32_t hal_gpio_i2c_send(uint32_t device_addr, const uint8_t *buf, uint32_t reg_len, uint32_t value_len);
197 uint32_t hal_gpio_i2c_recv(uint32_t device_addr, uint8_t *buf, uint32_t reg_len, uint32_t value_len, uint8_t restart_after_write);
198 // New GPIO I2C APIs
199 uint32_t hal_gpio_i2c_simple_send(uint32_t device_addr, const uint8_t *tx_buf, uint16_t tx_len);
200 uint32_t hal_gpio_i2c_simple_recv(uint32_t device_addr, const uint8_t *tx_buf, uint16_t tx_len, uint8_t *rx_buf, uint16_t rx_len);
201 
202 #ifdef __cplusplus
203 }
204 #endif
205 
206 #endif /* __HAL_I2C_H__ */
207