1 /*
2 * Arm SCP/MCP Software
3 * Copyright (c) 2020-2022, Arm Limited and Contributors. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #ifndef PLATFORM_CORE_H
9 #define PLATFORM_CORE_H
10
11 #include <fwk_assert.h>
12
13 #include <stdint.h>
14
15 #define PLATFORM_CORE_PER_CLUSTER_MAX 1
16
17 #define CORES_PER_CLUSTER 1
18 #if (PLATFORM_VARIANT == 0 || PLATFORM_VARIANT == 3)
19 # define NUMBER_OF_CLUSTERS 16
20 #elif (PLATFORM_VARIANT == 1)
21 # define NUMBER_OF_CLUSTERS 8
22 #elif (PLATFORM_VARIANT == 2)
23 # define NUMBER_OF_CLUSTERS 4
24 #else
25 # error "Unsupported PLATFORM_VARIANT value"
26 #endif
27
28 /* Number of chips supported on the platform. */
29 enum platform_chip_id {
30 PLATFORM_CHIP_0,
31 #if (PLATFORM_VARIANT == 2)
32 PLATFORM_CHIP_1,
33 PLATFORM_CHIP_2,
34 PLATFORM_CHIP_3,
35 #endif
36 PLATFORM_CHIP_COUNT
37 };
38
39 #define MAX_PE_PER_CORE 1
40 #define MAX_PE_PER_CLUSTER (CORES_PER_CLUSTER * MAX_PE_PER_CORE)
41 #define MAX_PE_PER_CHIP (NUMBER_OF_CLUSTERS * MAX_PE_PER_CLUSTER)
42
43 #define MPIDR_AFF0_SHIFT (0U)
44 #define MPIDR_AFF1_SHIFT (8U)
45 #define MPIDR_AFF2_SHIFT (16U)
46 #define MPIDR_AFF3_SHIFT (32U)
47 #define MPIDR_IMPL_MASK (0xffU)
48 #define GET_AFF(shift, mpid_val) ((mpid_val >> shift) & MPIDR_IMPL_MASK)
49 #define GET_AFF0(mpid_val) GET_AFF(MPIDR_AFF0_SHIFT, mpid_val)
50 #define GET_AFF1(mpid_val) GET_AFF(MPIDR_AFF1_SHIFT, mpid_val)
51 #define GET_AFF2(mpid_val) GET_AFF(MPIDR_AFF2_SHIFT, mpid_val)
52 #define GET_AFF3(mpid_val) GET_AFF(MPIDR_AFF3_SHIFT, mpid_val)
53
platform_get_cluster_count(void)54 static inline unsigned int platform_get_cluster_count(void)
55 {
56 return NUMBER_OF_CLUSTERS;
57 }
58
platform_get_core_per_cluster_count(unsigned int cluster)59 static inline unsigned int platform_get_core_per_cluster_count(
60 unsigned int cluster)
61 {
62 fwk_assert(cluster < platform_get_cluster_count());
63
64 return CORES_PER_CLUSTER;
65 }
66
platform_get_core_count(void)67 static inline unsigned int platform_get_core_count(void)
68 {
69 return platform_get_core_per_cluster_count(0) *
70 platform_get_cluster_count();
71 }
72
platform_calc_core_pos(uint64_t mpid)73 static inline uint8_t platform_calc_core_pos(uint64_t mpid)
74 {
75 uint8_t chip_id;
76 uint8_t cluster_id;
77 uint8_t core_id;
78 uint8_t thread_id;
79 uint8_t position;
80
81 chip_id = GET_AFF3(mpid);
82 cluster_id = GET_AFF2(mpid);
83 core_id = GET_AFF1(mpid);
84 thread_id = GET_AFF0(mpid);
85
86 position = (uint8_t)(
87 (chip_id * MAX_PE_PER_CHIP) + (cluster_id * MAX_PE_PER_CLUSTER) +
88 (core_id * MAX_PE_PER_CORE) + thread_id);
89
90 return position;
91 }
92
93 #endif /* PLATFORM_CORE_H */
94