1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef CPU_PIK_H
9 #define CPU_PIK_H
10 
11 #include "scp_mmap.h"
12 
13 #include <fwk_macros.h>
14 
15 #include <stdint.h>
16 
17 #define MAX_PIK_SUPPORTED_CPUS 10
18 
19 /*!
20  * \brief PE Static Configuration register definitions
21  */
22 struct static_config_reg {
23     FWK_RW uint32_t STATIC_CONFIG;
24     FWK_RW uint32_t RVBARADDR_LW;
25     FWK_RW uint32_t RVBARADDR_UP;
26     uint32_t RESERVED;
27 };
28 
29 /*!
30  * \brief AP cores clock control register definitions
31  */
32 struct coreclk_reg {
33     FWK_RW uint32_t DIV;
34     FWK_RW uint32_t CTRL;
35     FWK_RW uint32_t MOD;
36     uint32_t RESERVED;
37 };
38 /*!
39  * \brief CPU (v9) PIK register definitions
40  */
41 struct pik_cpu_reg {
42     FWK_RW uint32_t CLUSTER_CONFIG;
43     uint8_t RESERVED0[0x100 - 0x4];
44     struct static_config_reg STATIC_CONFIG[MAX_PIK_SUPPORTED_CPUS];
45     uint8_t RESERVED1[0x900 - 0x1a0];
46     struct coreclk_reg CORECLK[MAX_PIK_SUPPORTED_CPUS];
47 };
48 
49 #define CLUSTER_PIK_PTR ((struct pik_cpu_reg *)SCP_PIK_CLUSTER_BASE)
50 
51 #endif /* CPU_PIK_H */
52