1 /* 2 * Copyright (C) 2018 Marvell International Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * https://spdx.org/licenses 6 */ 7 8 #ifndef PLAT_MARVELL_H 9 #define PLAT_MARVELL_H 10 11 #include <stdint.h> 12 13 #include <common/bl_common.h> 14 #include <lib/cassert.h> 15 #include <lib/el3_runtime/cpu_data.h> 16 #include <lib/utils.h> 17 #include <lib/xlat_tables/xlat_tables_v2.h> 18 19 /* 20 * Extern declarations common to Marvell standard platforms 21 */ 22 extern const mmap_region_t plat_marvell_mmap[]; 23 24 #define MARVELL_CASSERT_MMAP \ 25 CASSERT((ARRAY_SIZE(plat_marvell_mmap) + MARVELL_BL_REGIONS) \ 26 <= MAX_MMAP_REGIONS, \ 27 assert_max_mmap_regions) 28 29 struct marvell_bl31_params { 30 param_header_t h; 31 image_info_t *bl31_image_info; 32 entry_point_info_t *bl32_ep_info; 33 image_info_t *bl32_image_info; 34 entry_point_info_t *bl33_ep_info; 35 image_info_t *bl33_image_info; 36 }; 37 38 /* 39 * Utility functions common to Marvell standard platforms 40 */ 41 void marvell_setup_page_tables(uintptr_t total_base, 42 size_t total_size, 43 uintptr_t code_start, 44 uintptr_t code_limit, 45 uintptr_t rodata_start, 46 uintptr_t rodata_limit 47 #if USE_COHERENT_MEM 48 , uintptr_t coh_start, 49 uintptr_t coh_limit 50 #endif 51 ); 52 53 /* Console utility functions */ 54 void marvell_console_boot_init(void); 55 void marvell_console_boot_end(void); 56 void marvell_console_runtime_init(void); 57 void marvell_console_runtime_end(void); 58 59 /* IO storage utility functions */ 60 void marvell_io_setup(void); 61 62 /* Systimer utility function */ 63 void marvell_configure_sys_timer(void); 64 65 /* Topology utility function */ 66 int marvell_check_mpidr(u_register_t mpidr); 67 68 /* BLE utility functions */ 69 int ble_plat_setup(int *skip); 70 void plat_marvell_dram_update_topology(void); 71 void ble_plat_pcie_ep_setup(void); 72 struct pci_hw_cfg *plat_get_pcie_hw_data(void); 73 74 /* BL1 utility functions */ 75 void marvell_bl1_early_platform_setup(void); 76 void marvell_bl1_platform_setup(void); 77 void marvell_bl1_plat_arch_setup(void); 78 79 /* BL2 utility functions */ 80 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout); 81 void marvell_bl2_platform_setup(void); 82 void marvell_bl2_plat_arch_setup(void); 83 uint32_t marvell_get_spsr_for_bl32_entry(void); 84 uint32_t marvell_get_spsr_for_bl33_entry(void); 85 86 /* BL31 utility functions */ 87 void marvell_bl31_early_platform_setup(void *from_bl2, 88 uintptr_t soc_fw_config, 89 uintptr_t hw_config, 90 void *plat_params_from_bl2); 91 void marvell_bl31_platform_setup(void); 92 void marvell_bl31_plat_runtime_setup(void); 93 void marvell_bl31_plat_arch_setup(void); 94 95 /* Power management config to power off the SoC */ 96 void *plat_marvell_get_pm_cfg(void); 97 98 /* Check if MSS AP CM3 firmware contains PM support */ 99 _Bool is_pm_fw_running(void); 100 101 /* Bootrom image recovery utility functions */ 102 void *plat_marvell_get_skip_image_data(void); 103 104 /* FIP TOC validity check */ 105 int marvell_io_is_toc_valid(void); 106 107 /* 108 * PSCI functionality 109 */ 110 void marvell_psci_arch_init(int ap_idx); 111 void plat_marvell_system_reset(void); 112 113 /* 114 * Miscellaneous platform SMC routines 115 */ 116 #ifdef MVEBU_PMU_IRQ_WA 117 void mvebu_pmu_interrupt_enable(void); 118 void mvebu_pmu_interrupt_disable(void); 119 #endif 120 121 /* 122 * Optional functions required in Marvell standard platforms 123 */ 124 void plat_marvell_io_setup(void); 125 int plat_marvell_get_alt_image_source( 126 unsigned int image_id, 127 uintptr_t *dev_handle, 128 uintptr_t *image_spec); 129 unsigned int plat_marvell_calc_core_pos(u_register_t mpidr); 130 131 const mmap_region_t *plat_marvell_get_mmap(void); 132 void marvell_ble_prepare_exit(void); 133 void marvell_exit_bootrom(uintptr_t base); 134 135 int plat_marvell_early_cpu_powerdown(void); 136 int bl2_plat_handle_scp_bl2(image_info_t *scp_bl2_image_info); 137 138 #endif /* PLAT_MARVELL_H */ 139