1 /*
2 * Copyright (c) 2016-2022, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <bl32/sp_min/platform_sp_min.h>
10 #include <common/debug.h>
11 #include <lib/fconf/fconf.h>
12 #include <lib/fconf/fconf_dyn_cfg_getter.h>
13 #include <plat/arm/common/plat_arm.h>
14
15 #include "../fvp_private.h"
16
plat_arm_sp_min_early_platform_setup(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)17 void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
18 u_register_t arg2, u_register_t arg3)
19 {
20 const struct dyn_cfg_dtb_info_t *tos_fw_config_info __unused;
21
22 /* Initialize the console to provide early debug support */
23 arm_console_boot_init();
24
25 #if !RESET_TO_SP_MIN && !BL2_AT_EL3
26
27 INFO("SP_MIN FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1);
28 /* Fill the properties struct with the info from the config dtb */
29 fconf_populate("FW_CONFIG", arg1);
30
31 tos_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TOS_FW_CONFIG_ID);
32 if (tos_fw_config_info != NULL) {
33 arg1 = tos_fw_config_info->config_addr;
34 }
35 #endif /* !RESET_TO_SP_MIN && !BL2_AT_EL3 */
36
37 arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
38
39 /* Initialize the platform config for future decision making */
40 fvp_config_setup();
41
42 /*
43 * Initialize the correct interconnect for this cluster during cold
44 * boot. No need for locks as no other CPU is active.
45 */
46 fvp_interconnect_init();
47
48 /*
49 * Enable coherency in interconnect for the primary CPU's cluster.
50 * Earlier bootloader stages might already do this (e.g. Trusted
51 * Firmware's BL1 does it) but we can't assume so. There is no harm in
52 * executing this code twice anyway.
53 * FVP PSCI code will enable coherency for other clusters.
54 */
55 fvp_interconnect_enable();
56 }
57
sp_min_plat_arch_setup(void)58 void sp_min_plat_arch_setup(void)
59 {
60 int rc __unused;
61 const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
62 uintptr_t hw_config_base_align __unused;
63 size_t mapped_size_align __unused;
64
65 arm_sp_min_plat_arch_setup();
66
67 /*
68 * For RESET_TO_SP_MIN systems, SP_MIN(BL32) is the first bootloader
69 * to run. So there is no BL2 to load the HW_CONFIG dtb into memory
70 * before control is passed to SP_MIN.
71 * Also, BL2 skips loading HW_CONFIG dtb for BL2_AT_EL3 builds.
72 * The code below relies on dynamic mapping capability, which is not
73 * supported by xlat tables lib V1.
74 * TODO: remove the ARM_XLAT_TABLES_LIB_V1 check when its support
75 * gets deprecated.
76 */
77 #if !RESET_TO_SP_MIN && !BL2_AT_EL3 && !ARM_XLAT_TABLES_LIB_V1
78 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
79 assert(hw_config_info != NULL);
80 assert(hw_config_info->config_addr != 0UL);
81
82 INFO("SP_MIN FCONF: HW_CONFIG address = %p\n",
83 (void *)hw_config_info->config_addr);
84
85 /*
86 * Preferrably we expect this address and size are page aligned,
87 * but if they are not then align it.
88 */
89 hw_config_base_align = page_align(hw_config_info->config_addr, DOWN);
90 mapped_size_align = page_align(hw_config_info->config_max_size, UP);
91
92 if ((hw_config_info->config_addr != hw_config_base_align) &&
93 (hw_config_info->config_max_size == mapped_size_align)) {
94 mapped_size_align += PAGE_SIZE;
95 }
96
97 /*
98 * map dynamically HW config region with its aligned base address and
99 * size
100 */
101 rc = mmap_add_dynamic_region((unsigned long long)hw_config_base_align,
102 hw_config_base_align,
103 mapped_size_align,
104 MT_RO_DATA);
105 if (rc != 0) {
106 ERROR("Error while mapping HW_CONFIG device tree (%d).\n", rc);
107 panic();
108 }
109
110 /* Populate HW_CONFIG device tree with the mapped address */
111 fconf_populate("HW_CONFIG", hw_config_info->config_addr);
112
113 /* unmap the HW_CONFIG memory region */
114 rc = mmap_remove_dynamic_region(hw_config_base_align, mapped_size_align);
115 if (rc != 0) {
116 ERROR("Error while unmapping HW_CONFIG device tree (%d).\n",
117 rc);
118 panic();
119 }
120 #endif /* !RESET_TO_SP_MIN && !BL2_AT_EL3 && !ARM_XLAT_TABLES_LIB_V1 */
121 }
122