1 /* 2 * Copyright (C) 2018 Marvell International Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * https://spdx.org/licenses 6 */ 7 8 #ifndef __PHY_PORTING_LAYER_H 9 #define __PHY_PORTING_LAYER_H 10 11 12 #define MAX_LANE_NR 6 13 #define XFI_PARAMS static const struct xfi_params 14 15 16 XFI_PARAMS xfi_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = { 17 /* AP0 */ 18 { 19 /* CP 0 */ 20 { 21 { 0 }, /* Comphy0 not relevant*/ 22 { 0 }, /* Comphy1 not relevant*/ 23 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, 24 .align90 = 0x5f, 25 .g1_dfe_res = 0x2, .g1_amp = 0x1c, 26 .g1_emph = 0xe, 27 .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, 28 .g1_tx_emph_en = 0x1, 29 .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, 30 .g1_rx_selmufi = 0x0, 31 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, 32 .valid = 1 }, /* Comphy2 */ 33 { 0 }, /* Comphy3 not relevant*/ 34 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, 35 .align90 = 0x5f, 36 .g1_dfe_res = 0x2, .g1_amp = 0x1c, 37 .g1_emph = 0xe, 38 .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, 39 .g1_tx_emph_en = 0x1, 40 .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, 41 .g1_rx_selmufi = 0x0, 42 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, 43 .valid = 1 }, /* Comphy4 */ 44 { 0 }, /* Comphy5 not relevant*/ 45 }, 46 #if CP_NUM > 1 47 /* CP 1 */ 48 { 49 { 0 }, /* Comphy0 not relevant*/ 50 { 0 }, /* Comphy1 not relevant*/ 51 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, 52 .align90 = 0x5f, 53 .g1_dfe_res = 0x2, .g1_amp = 0x1c, 54 .g1_emph = 0xe, 55 .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, 56 .g1_tx_emph_en = 0x1, 57 .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, 58 .g1_rx_selmufi = 0x0, 59 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, 60 .valid = 1 }, /* Comphy2 */ 61 { 0 }, /* Comphy3 not relevant*/ 62 /* different from defaults */ 63 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, 64 .align90 = 0x5f, 65 .g1_dfe_res = 0x2, .g1_amp = 0xc, 66 .g1_emph = 0x5, 67 .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, 68 .g1_tx_emph_en = 0x1, 69 .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, 70 .g1_rx_selmufi = 0x0, 71 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, 72 .valid = 1}, /* Comphy4 */ 73 { 0 }, /* Comphy5 not relevant*/ 74 }, 75 #if CP_NUM > 2 76 /* CP 2 */ 77 { 78 { 0 }, /* Comphy0 not relevant*/ 79 { 0 }, /* Comphy1 not relevant*/ 80 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, 81 .align90 = 0x5f, 82 .g1_dfe_res = 0x2, .g1_amp = 0x1c, 83 .g1_emph = 0xe, 84 .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, 85 .g1_tx_emph_en = 0x1, 86 .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, 87 .g1_rx_selmufi = 0x0, 88 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, 89 .valid = 1 }, /* Comphy2 */ 90 { 0 }, /* Comphy3 not relevant*/ 91 { .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf, 92 .align90 = 0x5f, 93 .g1_dfe_res = 0x2, .g1_amp = 0x1c, 94 .g1_emph = 0xe, 95 .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1, 96 .g1_tx_emph_en = 0x1, 97 .g1_tx_emph = 0x0, .g1_rx_selmuff = 0x1, 98 .g1_rx_selmufi = 0x0, 99 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, 100 .valid = 1 }, /* Comphy4 */ 101 { 0 }, /* Comphy5 not relevant*/ 102 }, 103 #endif 104 #endif 105 }, 106 }; 107 108 #define SATA_PARAMS static const struct sata_params 109 SATA_PARAMS sata_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = { 110 [0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = { 111 .g1_amp = 0x8, .g2_amp = 0xa, 112 .g3_amp = 0x1e, 113 .g1_emph = 0x1, .g2_emph = 0x2, 114 .g3_emph = 0xe, 115 .g1_emph_en = 0x1, .g2_emph_en = 0x1, 116 .g3_emph_en = 0x1, 117 .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1, 118 .g3_tx_amp_adj = 0x1, 119 .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0, 120 .g3_tx_emph_en = 0x0, 121 .g1_tx_emph = 0x1, .g2_tx_emph = 0x1, 122 .g3_tx_emph = 0x1, 123 .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4, 124 .g3_ffe_cap_sel = 0xf, 125 .align90 = 0x61, 126 .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3, 127 .g3_rx_selmuff = 0x3, 128 .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0, 129 .g3_rx_selmufi = 0x3, 130 .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1, 131 .g3_rx_selmupf = 0x2, 132 .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0, 133 .g3_rx_selmupi = 0x2, 134 .polarity_invert = COMPHY_POLARITY_NO_INVERT, 135 .valid = 0x1 136 }, 137 }; 138 139 static const struct usb_params 140 usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = { 141 [0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = { 142 .polarity_invert = COMPHY_POLARITY_NO_INVERT 143 }, 144 }; 145 #endif /* __PHY_PORTING_LAYER_H */ 146