1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2014 - 2021 Intel Corporation */
3 #include <adf_accel_devices.h>
4 #include <adf_common_drv.h>
5 #include <adf_gen2_config.h>
6 #include <adf_gen2_dc.h>
7 #include <adf_gen2_hw_data.h>
8 #include <adf_gen2_pfvf.h>
9 #include "adf_c62x_hw_data.h"
10 #include "icp_qat_hw.h"
11
12 /* Worker thread to service arbiter mappings */
13 static const u32 thrd_to_arb_map[ADF_C62X_MAX_ACCELENGINES] = {
14 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA,
15 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA
16 };
17
18 static struct adf_hw_device_class c62x_class = {
19 .name = ADF_C62X_DEVICE_NAME,
20 .type = DEV_C62X,
21 .instances = 0
22 };
23
get_accel_mask(struct adf_hw_device_data * self)24 static u32 get_accel_mask(struct adf_hw_device_data *self)
25 {
26 u32 straps = self->straps;
27 u32 fuses = self->fuses;
28 u32 accel;
29
30 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET;
31 accel &= ADF_C62X_ACCELERATORS_MASK;
32
33 return accel;
34 }
35
get_ae_mask(struct adf_hw_device_data * self)36 static u32 get_ae_mask(struct adf_hw_device_data *self)
37 {
38 u32 straps = self->straps;
39 u32 fuses = self->fuses;
40 unsigned long disabled;
41 u32 ae_disable;
42 int accel;
43
44 /* If an accel is disabled, then disable the corresponding two AEs */
45 disabled = ~get_accel_mask(self) & ADF_C62X_ACCELERATORS_MASK;
46 ae_disable = BIT(1) | BIT(0);
47 for_each_set_bit(accel, &disabled, ADF_C62X_MAX_ACCELERATORS)
48 straps |= ae_disable << (accel << 1);
49
50 return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK;
51 }
52
get_misc_bar_id(struct adf_hw_device_data * self)53 static u32 get_misc_bar_id(struct adf_hw_device_data *self)
54 {
55 return ADF_C62X_PMISC_BAR;
56 }
57
get_etr_bar_id(struct adf_hw_device_data * self)58 static u32 get_etr_bar_id(struct adf_hw_device_data *self)
59 {
60 return ADF_C62X_ETR_BAR;
61 }
62
get_sram_bar_id(struct adf_hw_device_data * self)63 static u32 get_sram_bar_id(struct adf_hw_device_data *self)
64 {
65 return ADF_C62X_SRAM_BAR;
66 }
67
get_sku(struct adf_hw_device_data * self)68 static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
69 {
70 int aes = self->get_num_aes(self);
71
72 if (aes == 8)
73 return DEV_SKU_2;
74 else if (aes == 10)
75 return DEV_SKU_4;
76
77 return DEV_SKU_UNKNOWN;
78 }
79
adf_get_arbiter_mapping(void)80 static const u32 *adf_get_arbiter_mapping(void)
81 {
82 return thrd_to_arb_map;
83 }
84
configure_iov_threads(struct adf_accel_dev * accel_dev,bool enable)85 static void configure_iov_threads(struct adf_accel_dev *accel_dev, bool enable)
86 {
87 adf_gen2_cfg_iov_thds(accel_dev, enable,
88 ADF_C62X_AE2FUNC_MAP_GRP_A_NUM_REGS,
89 ADF_C62X_AE2FUNC_MAP_GRP_B_NUM_REGS);
90 }
91
adf_init_hw_data_c62x(struct adf_hw_device_data * hw_data)92 void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data)
93 {
94 hw_data->dev_class = &c62x_class;
95 hw_data->instance_id = c62x_class.instances++;
96 hw_data->num_banks = ADF_C62X_ETR_MAX_BANKS;
97 hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK;
98 hw_data->num_accel = ADF_C62X_MAX_ACCELERATORS;
99 hw_data->num_logical_accel = 1;
100 hw_data->num_engines = ADF_C62X_MAX_ACCELENGINES;
101 hw_data->tx_rx_gap = ADF_GEN2_RX_RINGS_OFFSET;
102 hw_data->tx_rings_mask = ADF_GEN2_TX_RINGS_MASK;
103 hw_data->ring_to_svc_map = ADF_GEN2_DEFAULT_RING_TO_SRV_MAP;
104 hw_data->alloc_irq = adf_isr_resource_alloc;
105 hw_data->free_irq = adf_isr_resource_free;
106 hw_data->enable_error_correction = adf_gen2_enable_error_correction;
107 hw_data->get_accel_mask = get_accel_mask;
108 hw_data->get_ae_mask = get_ae_mask;
109 hw_data->get_accel_cap = adf_gen2_get_accel_cap;
110 hw_data->get_num_accels = adf_gen2_get_num_accels;
111 hw_data->get_num_aes = adf_gen2_get_num_aes;
112 hw_data->get_sram_bar_id = get_sram_bar_id;
113 hw_data->get_etr_bar_id = get_etr_bar_id;
114 hw_data->get_misc_bar_id = get_misc_bar_id;
115 hw_data->get_admin_info = adf_gen2_get_admin_info;
116 hw_data->get_arb_info = adf_gen2_get_arb_info;
117 hw_data->get_sku = get_sku;
118 hw_data->fw_name = ADF_C62X_FW;
119 hw_data->fw_mmp_name = ADF_C62X_MMP;
120 hw_data->init_admin_comms = adf_init_admin_comms;
121 hw_data->exit_admin_comms = adf_exit_admin_comms;
122 hw_data->configure_iov_threads = configure_iov_threads;
123 hw_data->send_admin_init = adf_send_admin_init;
124 hw_data->init_arb = adf_init_arb;
125 hw_data->exit_arb = adf_exit_arb;
126 hw_data->get_arb_mapping = adf_get_arbiter_mapping;
127 hw_data->enable_ints = adf_gen2_enable_ints;
128 hw_data->reset_device = adf_reset_flr;
129 hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
130 hw_data->disable_iov = adf_disable_sriov;
131 hw_data->dev_config = adf_gen2_dev_config;
132
133 adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
134 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);
135 adf_gen2_init_dc_ops(&hw_data->dc_ops);
136 }
137
adf_clean_hw_data_c62x(struct adf_hw_device_data * hw_data)138 void adf_clean_hw_data_c62x(struct adf_hw_device_data *hw_data)
139 {
140 hw_data->dev_class->instances--;
141 }
142