1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
5 *
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
8 *
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
11 *
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
14 *
15 */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regulator/consumer.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-event.h>
27 #include <media/v4l2-fwnode.h>
28 #include <media/v4l2-mediabus.h>
29 #include <asm/unaligned.h>
30
31 #define IMX219_REG_VALUE_08BIT 1
32 #define IMX219_REG_VALUE_16BIT 2
33
34 #define IMX219_REG_MODE_SELECT 0x0100
35 #define IMX219_MODE_STANDBY 0x00
36 #define IMX219_MODE_STREAMING 0x01
37
38 /* Chip ID */
39 #define IMX219_REG_CHIP_ID 0x0000
40 #define IMX219_CHIP_ID 0x0219
41
42 /* External clock frequency is 24.0M */
43 #define IMX219_XCLK_FREQ 24000000
44
45 /* Pixel rate is fixed for all the modes */
46 #define IMX219_PIXEL_RATE 182400000
47 #define IMX219_PIXEL_RATE_4LANE 280800000
48
49 #define IMX219_DEFAULT_LINK_FREQ 456000000
50 #define IMX219_DEFAULT_LINK_FREQ_4LANE 363000000
51
52 #define IMX219_REG_CSI_LANE_MODE 0x0114
53 #define IMX219_CSI_2_LANE_MODE 0x01
54 #define IMX219_CSI_4_LANE_MODE 0x03
55
56 /* V_TIMING internal */
57 #define IMX219_REG_VTS 0x0160
58 #define IMX219_VTS_15FPS 0x0dc6
59 #define IMX219_VTS_30FPS_1080P 0x06e3
60 #define IMX219_VTS_30FPS_BINNED 0x06e3
61 #define IMX219_VTS_30FPS_640x480 0x06e3
62 #define IMX219_VTS_MAX 0xffff
63
64 #define IMX219_VBLANK_MIN 4
65
66 /*Frame Length Line*/
67 #define IMX219_FLL_MIN 0x08a6
68 #define IMX219_FLL_MAX 0xffff
69 #define IMX219_FLL_STEP 1
70 #define IMX219_FLL_DEFAULT 0x0c98
71
72 /* HBLANK control - read only */
73 #define IMX219_PPL_DEFAULT 3448
74
75 /* Exposure control */
76 #define IMX219_REG_EXPOSURE 0x015a
77 #define IMX219_EXPOSURE_MIN 4
78 #define IMX219_EXPOSURE_STEP 1
79 #define IMX219_EXPOSURE_DEFAULT 0x640
80 #define IMX219_EXPOSURE_MAX 65535
81
82 /* Analog gain control */
83 #define IMX219_REG_ANALOG_GAIN 0x0157
84 #define IMX219_ANA_GAIN_MIN 0
85 #define IMX219_ANA_GAIN_MAX 232
86 #define IMX219_ANA_GAIN_STEP 1
87 #define IMX219_ANA_GAIN_DEFAULT 0x0
88
89 /* Digital gain control */
90 #define IMX219_REG_DIGITAL_GAIN 0x0158
91 #define IMX219_DGTL_GAIN_MIN 0x0100
92 #define IMX219_DGTL_GAIN_MAX 0x0fff
93 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
94 #define IMX219_DGTL_GAIN_STEP 1
95
96 #define IMX219_REG_ORIENTATION 0x0172
97
98 /* Binning Mode */
99 #define IMX219_REG_BINNING_MODE 0x0174
100 #define IMX219_BINNING_NONE 0x0000
101 #define IMX219_BINNING_2X2 0x0101
102 #define IMX219_BINNING_2X2_ANALOG 0x0303
103
104 /* Test Pattern Control */
105 #define IMX219_REG_TEST_PATTERN 0x0600
106 #define IMX219_TEST_PATTERN_DISABLE 0
107 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
108 #define IMX219_TEST_PATTERN_COLOR_BARS 2
109 #define IMX219_TEST_PATTERN_GREY_COLOR 3
110 #define IMX219_TEST_PATTERN_PN9 4
111
112 /* Test pattern colour components */
113 #define IMX219_REG_TESTP_RED 0x0602
114 #define IMX219_REG_TESTP_GREENR 0x0604
115 #define IMX219_REG_TESTP_BLUE 0x0606
116 #define IMX219_REG_TESTP_GREENB 0x0608
117 #define IMX219_TESTP_COLOUR_MIN 0
118 #define IMX219_TESTP_COLOUR_MAX 0x03ff
119 #define IMX219_TESTP_COLOUR_STEP 1
120 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX
121 #define IMX219_TESTP_GREENR_DEFAULT 0
122 #define IMX219_TESTP_BLUE_DEFAULT 0
123 #define IMX219_TESTP_GREENB_DEFAULT 0
124
125 /* IMX219 native and active pixel array size. */
126 #define IMX219_NATIVE_WIDTH 3296U
127 #define IMX219_NATIVE_HEIGHT 2480U
128 #define IMX219_PIXEL_ARRAY_LEFT 8U
129 #define IMX219_PIXEL_ARRAY_TOP 8U
130 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
131 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
132
133 struct imx219_reg {
134 u16 address;
135 u8 val;
136 };
137
138 struct imx219_reg_list {
139 unsigned int num_of_regs;
140 const struct imx219_reg *regs;
141 };
142
143 /* Mode : resolution and related config&values */
144 struct imx219_mode {
145 /* Frame width */
146 unsigned int width;
147 /* Frame height */
148 unsigned int height;
149
150 /* Analog crop rectangle. */
151 struct v4l2_rect crop;
152
153 /* V-timing */
154 unsigned int vts_def;
155
156 /* Default register values */
157 struct imx219_reg_list reg_list;
158
159 /* 2x2 binning is used */
160 bool binning;
161 };
162
163 static const struct imx219_reg imx219_common_regs[] = {
164 {0x0100, 0x00}, /* Mode Select */
165
166 /* To Access Addresses 3000-5fff, send the following commands */
167 {0x30eb, 0x0c},
168 {0x30eb, 0x05},
169 {0x300a, 0xff},
170 {0x300b, 0xff},
171 {0x30eb, 0x05},
172 {0x30eb, 0x09},
173
174 /* PLL Clock Table */
175 {0x0301, 0x05}, /* VTPXCK_DIV */
176 {0x0303, 0x01}, /* VTSYSCK_DIV */
177 {0x0304, 0x03}, /* PREPLLCK_VT_DIV 0x03 = AUTO set */
178 {0x0305, 0x03}, /* PREPLLCK_OP_DIV 0x03 = AUTO set */
179 {0x0306, 0x00}, /* PLL_VT_MPY */
180 {0x0307, 0x39},
181 {0x030b, 0x01}, /* OP_SYS_CLK_DIV */
182 {0x030c, 0x00}, /* PLL_OP_MPY */
183 {0x030d, 0x72},
184
185 /* Undocumented registers */
186 {0x455e, 0x00},
187 {0x471e, 0x4b},
188 {0x4767, 0x0f},
189 {0x4750, 0x14},
190 {0x4540, 0x00},
191 {0x47b4, 0x14},
192 {0x4713, 0x30},
193 {0x478b, 0x10},
194 {0x478f, 0x10},
195 {0x4793, 0x10},
196 {0x4797, 0x0e},
197 {0x479b, 0x0e},
198
199 /* Frame Bank Register Group "A" */
200 {0x0162, 0x0d}, /* Line_Length_A */
201 {0x0163, 0x78},
202 {0x0170, 0x01}, /* X_ODD_INC_A */
203 {0x0171, 0x01}, /* Y_ODD_INC_A */
204
205 /* Output setup registers */
206 {0x0114, 0x01}, /* CSI 2-Lane Mode */
207 {0x0128, 0x00}, /* DPHY Auto Mode */
208 {0x012a, 0x18}, /* EXCK_Freq */
209 {0x012b, 0x00},
210 };
211
212 /*
213 * Register sets lifted off the i2C interface from the Raspberry Pi firmware
214 * driver.
215 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7.
216 */
217 static const struct imx219_reg mode_3280x2464_regs[] = {
218 {0x0164, 0x00},
219 {0x0165, 0x00},
220 {0x0166, 0x0c},
221 {0x0167, 0xcf},
222 {0x0168, 0x00},
223 {0x0169, 0x00},
224 {0x016a, 0x09},
225 {0x016b, 0x9f},
226 {0x016c, 0x0c},
227 {0x016d, 0xd0},
228 {0x016e, 0x09},
229 {0x016f, 0xa0},
230 {0x0624, 0x0c},
231 {0x0625, 0xd0},
232 {0x0626, 0x09},
233 {0x0627, 0xa0},
234 };
235
236 static const struct imx219_reg mode_1920_1080_regs[] = {
237 {0x0164, 0x02},
238 {0x0165, 0xa8},
239 {0x0166, 0x0a},
240 {0x0167, 0x27},
241 {0x0168, 0x02},
242 {0x0169, 0xb4},
243 {0x016a, 0x06},
244 {0x016b, 0xeb},
245 {0x016c, 0x07},
246 {0x016d, 0x80},
247 {0x016e, 0x04},
248 {0x016f, 0x38},
249 {0x0624, 0x07},
250 {0x0625, 0x80},
251 {0x0626, 0x04},
252 {0x0627, 0x38},
253 };
254
255 static const struct imx219_reg mode_1640_1232_regs[] = {
256 {0x0164, 0x00},
257 {0x0165, 0x00},
258 {0x0166, 0x0c},
259 {0x0167, 0xcf},
260 {0x0168, 0x00},
261 {0x0169, 0x00},
262 {0x016a, 0x09},
263 {0x016b, 0x9f},
264 {0x016c, 0x06},
265 {0x016d, 0x68},
266 {0x016e, 0x04},
267 {0x016f, 0xd0},
268 {0x0624, 0x06},
269 {0x0625, 0x68},
270 {0x0626, 0x04},
271 {0x0627, 0xd0},
272 };
273
274 static const struct imx219_reg mode_640_480_regs[] = {
275 {0x0164, 0x03},
276 {0x0165, 0xe8},
277 {0x0166, 0x08},
278 {0x0167, 0xe7},
279 {0x0168, 0x02},
280 {0x0169, 0xf0},
281 {0x016a, 0x06},
282 {0x016b, 0xaf},
283 {0x016c, 0x02},
284 {0x016d, 0x80},
285 {0x016e, 0x01},
286 {0x016f, 0xe0},
287 {0x0624, 0x06},
288 {0x0625, 0x68},
289 {0x0626, 0x04},
290 {0x0627, 0xd0},
291 };
292
293 static const struct imx219_reg raw8_framefmt_regs[] = {
294 {0x018c, 0x08},
295 {0x018d, 0x08},
296 {0x0309, 0x08},
297 };
298
299 static const struct imx219_reg raw10_framefmt_regs[] = {
300 {0x018c, 0x0a},
301 {0x018d, 0x0a},
302 {0x0309, 0x0a},
303 };
304
305 static const s64 imx219_link_freq_menu[] = {
306 IMX219_DEFAULT_LINK_FREQ,
307 };
308
309 static const s64 imx219_link_freq_4lane_menu[] = {
310 IMX219_DEFAULT_LINK_FREQ_4LANE,
311 };
312
313 static const char * const imx219_test_pattern_menu[] = {
314 "Disabled",
315 "Color Bars",
316 "Solid Color",
317 "Grey Color Bars",
318 "PN9"
319 };
320
321 static const int imx219_test_pattern_val[] = {
322 IMX219_TEST_PATTERN_DISABLE,
323 IMX219_TEST_PATTERN_COLOR_BARS,
324 IMX219_TEST_PATTERN_SOLID_COLOR,
325 IMX219_TEST_PATTERN_GREY_COLOR,
326 IMX219_TEST_PATTERN_PN9,
327 };
328
329 /* regulator supplies */
330 static const char * const imx219_supply_name[] = {
331 /* Supplies can be enabled in any order */
332 "VANA", /* Analog (2.8V) supply */
333 "VDIG", /* Digital Core (1.8V) supply */
334 "VDDL", /* IF (1.2V) supply */
335 };
336
337 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
338
339 /*
340 * The supported formats.
341 * This table MUST contain 4 entries per format, to cover the various flip
342 * combinations in the order
343 * - no flip
344 * - h flip
345 * - v flip
346 * - h&v flips
347 */
348 static const u32 codes[] = {
349 MEDIA_BUS_FMT_SRGGB10_1X10,
350 MEDIA_BUS_FMT_SGRBG10_1X10,
351 MEDIA_BUS_FMT_SGBRG10_1X10,
352 MEDIA_BUS_FMT_SBGGR10_1X10,
353
354 MEDIA_BUS_FMT_SRGGB8_1X8,
355 MEDIA_BUS_FMT_SGRBG8_1X8,
356 MEDIA_BUS_FMT_SGBRG8_1X8,
357 MEDIA_BUS_FMT_SBGGR8_1X8,
358 };
359
360 /*
361 * Initialisation delay between XCLR low->high and the moment when the sensor
362 * can start capture (i.e. can leave software stanby) must be not less than:
363 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
364 * where
365 * t4 is fixed, and is max 200uS,
366 * t5 is fixed, and is 6000uS,
367 * t6 depends on the sensor external clock, and is max 32000 clock periods.
368 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
369 * So for any acceptable external clock t6 is always within the range of
370 * 1185 to 5333 uS, and is always less than t5.
371 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
372 * initialize the sensor over I2C, and then exit the software standby.
373 *
374 * This start-up time can be optimized a bit more, if we start the writes
375 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
376 * initialization over I2C may complete before (t4+t5) expires, and we must
377 * ensure that capture is not started before (t4+t5).
378 *
379 * This delay doesn't account for the power supply startup time. If needed,
380 * this should be taken care of via the regulator framework. E.g. in the
381 * case of DT for regulator-fixed one should define the startup-delay-us
382 * property.
383 */
384 #define IMX219_XCLR_MIN_DELAY_US 6200
385 #define IMX219_XCLR_DELAY_RANGE_US 1000
386
387 /* Mode configs */
388 static const struct imx219_mode supported_modes[] = {
389 {
390 /* 8MPix 15fps mode */
391 .width = 3280,
392 .height = 2464,
393 .crop = {
394 .left = IMX219_PIXEL_ARRAY_LEFT,
395 .top = IMX219_PIXEL_ARRAY_TOP,
396 .width = 3280,
397 .height = 2464
398 },
399 .vts_def = IMX219_VTS_15FPS,
400 .reg_list = {
401 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
402 .regs = mode_3280x2464_regs,
403 },
404 .binning = false,
405 },
406 {
407 /* 1080P 30fps cropped */
408 .width = 1920,
409 .height = 1080,
410 .crop = {
411 .left = 688,
412 .top = 700,
413 .width = 1920,
414 .height = 1080
415 },
416 .vts_def = IMX219_VTS_30FPS_1080P,
417 .reg_list = {
418 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs),
419 .regs = mode_1920_1080_regs,
420 },
421 .binning = false,
422 },
423 {
424 /* 2x2 binned 30fps mode */
425 .width = 1640,
426 .height = 1232,
427 .crop = {
428 .left = IMX219_PIXEL_ARRAY_LEFT,
429 .top = IMX219_PIXEL_ARRAY_TOP,
430 .width = 3280,
431 .height = 2464
432 },
433 .vts_def = IMX219_VTS_30FPS_BINNED,
434 .reg_list = {
435 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs),
436 .regs = mode_1640_1232_regs,
437 },
438 .binning = true,
439 },
440 {
441 /* 640x480 30fps mode */
442 .width = 640,
443 .height = 480,
444 .crop = {
445 .left = 1008,
446 .top = 760,
447 .width = 1280,
448 .height = 960
449 },
450 .vts_def = IMX219_VTS_30FPS_640x480,
451 .reg_list = {
452 .num_of_regs = ARRAY_SIZE(mode_640_480_regs),
453 .regs = mode_640_480_regs,
454 },
455 .binning = true,
456 },
457 };
458
459 struct imx219 {
460 struct v4l2_subdev sd;
461 struct media_pad pad;
462
463 struct v4l2_mbus_framefmt fmt;
464
465 struct clk *xclk; /* system clock to IMX219 */
466 u32 xclk_freq;
467
468 struct gpio_desc *reset_gpio;
469 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
470
471 struct v4l2_ctrl_handler ctrl_handler;
472 /* V4L2 Controls */
473 struct v4l2_ctrl *pixel_rate;
474 struct v4l2_ctrl *link_freq;
475 struct v4l2_ctrl *exposure;
476 struct v4l2_ctrl *vflip;
477 struct v4l2_ctrl *hflip;
478 struct v4l2_ctrl *vblank;
479 struct v4l2_ctrl *hblank;
480
481 /* Current mode */
482 const struct imx219_mode *mode;
483
484 /*
485 * Mutex for serialized access:
486 * Protect sensor module set pad format and start/stop streaming safely.
487 */
488 struct mutex mutex;
489
490 /* Streaming on/off */
491 bool streaming;
492
493 /* Two or Four lanes */
494 u8 lanes;
495 };
496
to_imx219(struct v4l2_subdev * _sd)497 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
498 {
499 return container_of(_sd, struct imx219, sd);
500 }
501
502 /* Read registers up to 2 at a time */
imx219_read_reg(struct imx219 * imx219,u16 reg,u32 len,u32 * val)503 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)
504 {
505 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
506 struct i2c_msg msgs[2];
507 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
508 u8 data_buf[4] = { 0, };
509 int ret;
510
511 if (len > 4)
512 return -EINVAL;
513
514 /* Write register address */
515 msgs[0].addr = client->addr;
516 msgs[0].flags = 0;
517 msgs[0].len = ARRAY_SIZE(addr_buf);
518 msgs[0].buf = addr_buf;
519
520 /* Read data from register */
521 msgs[1].addr = client->addr;
522 msgs[1].flags = I2C_M_RD;
523 msgs[1].len = len;
524 msgs[1].buf = &data_buf[4 - len];
525
526 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
527 if (ret != ARRAY_SIZE(msgs))
528 return -EIO;
529
530 *val = get_unaligned_be32(data_buf);
531
532 return 0;
533 }
534
535 /* Write registers up to 2 at a time */
imx219_write_reg(struct imx219 * imx219,u16 reg,u32 len,u32 val)536 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)
537 {
538 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
539 u8 buf[6];
540
541 if (len > 4)
542 return -EINVAL;
543
544 put_unaligned_be16(reg, buf);
545 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
546 if (i2c_master_send(client, buf, len + 2) != len + 2)
547 return -EIO;
548
549 return 0;
550 }
551
552 /* Write a list of registers */
imx219_write_regs(struct imx219 * imx219,const struct imx219_reg * regs,u32 len)553 static int imx219_write_regs(struct imx219 *imx219,
554 const struct imx219_reg *regs, u32 len)
555 {
556 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
557 unsigned int i;
558 int ret;
559
560 for (i = 0; i < len; i++) {
561 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val);
562 if (ret) {
563 dev_err_ratelimited(&client->dev,
564 "Failed to write reg 0x%4.4x. error = %d\n",
565 regs[i].address, ret);
566
567 return ret;
568 }
569 }
570
571 return 0;
572 }
573
574 /* Get bayer order based on flip setting. */
imx219_get_format_code(struct imx219 * imx219,u32 code)575 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
576 {
577 unsigned int i;
578
579 lockdep_assert_held(&imx219->mutex);
580
581 for (i = 0; i < ARRAY_SIZE(codes); i++)
582 if (codes[i] == code)
583 break;
584
585 if (i >= ARRAY_SIZE(codes))
586 i = 0;
587
588 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
589 (imx219->hflip->val ? 1 : 0);
590
591 return codes[i];
592 }
593
imx219_set_default_format(struct imx219 * imx219)594 static void imx219_set_default_format(struct imx219 *imx219)
595 {
596 struct v4l2_mbus_framefmt *fmt;
597
598 fmt = &imx219->fmt;
599 fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
600 fmt->colorspace = V4L2_COLORSPACE_SRGB;
601 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
602 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
603 fmt->colorspace,
604 fmt->ycbcr_enc);
605 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
606 fmt->width = supported_modes[0].width;
607 fmt->height = supported_modes[0].height;
608 fmt->field = V4L2_FIELD_NONE;
609 }
610
imx219_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)611 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
612 {
613 struct imx219 *imx219 = to_imx219(sd);
614 struct v4l2_mbus_framefmt *try_fmt =
615 v4l2_subdev_get_try_format(sd, fh->state, 0);
616 struct v4l2_rect *try_crop;
617
618 mutex_lock(&imx219->mutex);
619
620 /* Initialize try_fmt */
621 try_fmt->width = supported_modes[0].width;
622 try_fmt->height = supported_modes[0].height;
623 try_fmt->code = imx219_get_format_code(imx219,
624 MEDIA_BUS_FMT_SRGGB10_1X10);
625 try_fmt->field = V4L2_FIELD_NONE;
626
627 /* Initialize try_crop rectangle. */
628 try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
629 try_crop->top = IMX219_PIXEL_ARRAY_TOP;
630 try_crop->left = IMX219_PIXEL_ARRAY_LEFT;
631 try_crop->width = IMX219_PIXEL_ARRAY_WIDTH;
632 try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT;
633
634 mutex_unlock(&imx219->mutex);
635
636 return 0;
637 }
638
imx219_set_ctrl(struct v4l2_ctrl * ctrl)639 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
640 {
641 struct imx219 *imx219 =
642 container_of(ctrl->handler, struct imx219, ctrl_handler);
643 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
644 int ret;
645
646 if (ctrl->id == V4L2_CID_VBLANK) {
647 int exposure_max, exposure_def;
648
649 /* Update max exposure while meeting expected vblanking */
650 exposure_max = imx219->mode->height + ctrl->val - 4;
651 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
652 exposure_max : IMX219_EXPOSURE_DEFAULT;
653 __v4l2_ctrl_modify_range(imx219->exposure,
654 imx219->exposure->minimum,
655 exposure_max, imx219->exposure->step,
656 exposure_def);
657 }
658
659 /*
660 * Applying V4L2 control value only happens
661 * when power is up for streaming
662 */
663 if (pm_runtime_get_if_in_use(&client->dev) == 0)
664 return 0;
665
666 switch (ctrl->id) {
667 case V4L2_CID_ANALOGUE_GAIN:
668 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN,
669 IMX219_REG_VALUE_08BIT, ctrl->val);
670 break;
671 case V4L2_CID_EXPOSURE:
672 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE,
673 IMX219_REG_VALUE_16BIT, ctrl->val);
674 break;
675 case V4L2_CID_DIGITAL_GAIN:
676 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN,
677 IMX219_REG_VALUE_16BIT, ctrl->val);
678 break;
679 case V4L2_CID_TEST_PATTERN:
680 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN,
681 IMX219_REG_VALUE_16BIT,
682 imx219_test_pattern_val[ctrl->val]);
683 break;
684 case V4L2_CID_HFLIP:
685 case V4L2_CID_VFLIP:
686 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1,
687 imx219->hflip->val |
688 imx219->vflip->val << 1);
689 break;
690 case V4L2_CID_VBLANK:
691 ret = imx219_write_reg(imx219, IMX219_REG_VTS,
692 IMX219_REG_VALUE_16BIT,
693 imx219->mode->height + ctrl->val);
694 break;
695 case V4L2_CID_TEST_PATTERN_RED:
696 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED,
697 IMX219_REG_VALUE_16BIT, ctrl->val);
698 break;
699 case V4L2_CID_TEST_PATTERN_GREENR:
700 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR,
701 IMX219_REG_VALUE_16BIT, ctrl->val);
702 break;
703 case V4L2_CID_TEST_PATTERN_BLUE:
704 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE,
705 IMX219_REG_VALUE_16BIT, ctrl->val);
706 break;
707 case V4L2_CID_TEST_PATTERN_GREENB:
708 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB,
709 IMX219_REG_VALUE_16BIT, ctrl->val);
710 break;
711 default:
712 dev_info(&client->dev,
713 "ctrl(id:0x%x,val:0x%x) is not handled\n",
714 ctrl->id, ctrl->val);
715 ret = -EINVAL;
716 break;
717 }
718
719 pm_runtime_put(&client->dev);
720
721 return ret;
722 }
723
724 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
725 .s_ctrl = imx219_set_ctrl,
726 };
727
imx219_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)728 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
729 struct v4l2_subdev_state *sd_state,
730 struct v4l2_subdev_mbus_code_enum *code)
731 {
732 struct imx219 *imx219 = to_imx219(sd);
733
734 if (code->index >= (ARRAY_SIZE(codes) / 4))
735 return -EINVAL;
736
737 mutex_lock(&imx219->mutex);
738 code->code = imx219_get_format_code(imx219, codes[code->index * 4]);
739 mutex_unlock(&imx219->mutex);
740
741 return 0;
742 }
743
imx219_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)744 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
745 struct v4l2_subdev_state *sd_state,
746 struct v4l2_subdev_frame_size_enum *fse)
747 {
748 struct imx219 *imx219 = to_imx219(sd);
749 u32 code;
750
751 if (fse->index >= ARRAY_SIZE(supported_modes))
752 return -EINVAL;
753
754 mutex_lock(&imx219->mutex);
755 code = imx219_get_format_code(imx219, fse->code);
756 mutex_unlock(&imx219->mutex);
757 if (fse->code != code)
758 return -EINVAL;
759
760 fse->min_width = supported_modes[fse->index].width;
761 fse->max_width = fse->min_width;
762 fse->min_height = supported_modes[fse->index].height;
763 fse->max_height = fse->min_height;
764
765 return 0;
766 }
767
imx219_reset_colorspace(struct v4l2_mbus_framefmt * fmt)768 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
769 {
770 fmt->colorspace = V4L2_COLORSPACE_SRGB;
771 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
772 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
773 fmt->colorspace,
774 fmt->ycbcr_enc);
775 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
776 }
777
imx219_update_pad_format(struct imx219 * imx219,const struct imx219_mode * mode,struct v4l2_subdev_format * fmt)778 static void imx219_update_pad_format(struct imx219 *imx219,
779 const struct imx219_mode *mode,
780 struct v4l2_subdev_format *fmt)
781 {
782 fmt->format.width = mode->width;
783 fmt->format.height = mode->height;
784 fmt->format.field = V4L2_FIELD_NONE;
785 imx219_reset_colorspace(&fmt->format);
786 }
787
__imx219_get_pad_format(struct imx219 * imx219,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)788 static int __imx219_get_pad_format(struct imx219 *imx219,
789 struct v4l2_subdev_state *sd_state,
790 struct v4l2_subdev_format *fmt)
791 {
792 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
793 struct v4l2_mbus_framefmt *try_fmt =
794 v4l2_subdev_get_try_format(&imx219->sd, sd_state,
795 fmt->pad);
796 /* update the code which could change due to vflip or hflip: */
797 try_fmt->code = imx219_get_format_code(imx219, try_fmt->code);
798 fmt->format = *try_fmt;
799 } else {
800 imx219_update_pad_format(imx219, imx219->mode, fmt);
801 fmt->format.code = imx219_get_format_code(imx219,
802 imx219->fmt.code);
803 }
804
805 return 0;
806 }
807
imx219_get_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)808 static int imx219_get_pad_format(struct v4l2_subdev *sd,
809 struct v4l2_subdev_state *sd_state,
810 struct v4l2_subdev_format *fmt)
811 {
812 struct imx219 *imx219 = to_imx219(sd);
813 int ret;
814
815 mutex_lock(&imx219->mutex);
816 ret = __imx219_get_pad_format(imx219, sd_state, fmt);
817 mutex_unlock(&imx219->mutex);
818
819 return ret;
820 }
821
imx219_set_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)822 static int imx219_set_pad_format(struct v4l2_subdev *sd,
823 struct v4l2_subdev_state *sd_state,
824 struct v4l2_subdev_format *fmt)
825 {
826 struct imx219 *imx219 = to_imx219(sd);
827 const struct imx219_mode *mode;
828 struct v4l2_mbus_framefmt *framefmt;
829 int exposure_max, exposure_def, hblank;
830 unsigned int i;
831
832 mutex_lock(&imx219->mutex);
833
834 for (i = 0; i < ARRAY_SIZE(codes); i++)
835 if (codes[i] == fmt->format.code)
836 break;
837 if (i >= ARRAY_SIZE(codes))
838 i = 0;
839
840 /* Bayer order varies with flips */
841 fmt->format.code = imx219_get_format_code(imx219, codes[i]);
842
843 mode = v4l2_find_nearest_size(supported_modes,
844 ARRAY_SIZE(supported_modes),
845 width, height,
846 fmt->format.width, fmt->format.height);
847 imx219_update_pad_format(imx219, mode, fmt);
848 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
849 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
850 *framefmt = fmt->format;
851 } else if (imx219->mode != mode ||
852 imx219->fmt.code != fmt->format.code) {
853 imx219->fmt = fmt->format;
854 imx219->mode = mode;
855 /* Update limits and set FPS to default */
856 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
857 IMX219_VTS_MAX - mode->height, 1,
858 mode->vts_def - mode->height);
859 __v4l2_ctrl_s_ctrl(imx219->vblank,
860 mode->vts_def - mode->height);
861 /* Update max exposure while meeting expected vblanking */
862 exposure_max = mode->vts_def - 4;
863 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
864 exposure_max : IMX219_EXPOSURE_DEFAULT;
865 __v4l2_ctrl_modify_range(imx219->exposure,
866 imx219->exposure->minimum,
867 exposure_max, imx219->exposure->step,
868 exposure_def);
869 /*
870 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
871 * depends on mode->width only, and is not changeble in any
872 * way other than changing the mode.
873 */
874 hblank = IMX219_PPL_DEFAULT - mode->width;
875 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
876 hblank);
877 }
878
879 mutex_unlock(&imx219->mutex);
880
881 return 0;
882 }
883
imx219_set_framefmt(struct imx219 * imx219)884 static int imx219_set_framefmt(struct imx219 *imx219)
885 {
886 switch (imx219->fmt.code) {
887 case MEDIA_BUS_FMT_SRGGB8_1X8:
888 case MEDIA_BUS_FMT_SGRBG8_1X8:
889 case MEDIA_BUS_FMT_SGBRG8_1X8:
890 case MEDIA_BUS_FMT_SBGGR8_1X8:
891 return imx219_write_regs(imx219, raw8_framefmt_regs,
892 ARRAY_SIZE(raw8_framefmt_regs));
893
894 case MEDIA_BUS_FMT_SRGGB10_1X10:
895 case MEDIA_BUS_FMT_SGRBG10_1X10:
896 case MEDIA_BUS_FMT_SGBRG10_1X10:
897 case MEDIA_BUS_FMT_SBGGR10_1X10:
898 return imx219_write_regs(imx219, raw10_framefmt_regs,
899 ARRAY_SIZE(raw10_framefmt_regs));
900 }
901
902 return -EINVAL;
903 }
904
imx219_set_binning(struct imx219 * imx219)905 static int imx219_set_binning(struct imx219 *imx219)
906 {
907 if (!imx219->mode->binning) {
908 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
909 IMX219_REG_VALUE_16BIT,
910 IMX219_BINNING_NONE);
911 }
912
913 switch (imx219->fmt.code) {
914 case MEDIA_BUS_FMT_SRGGB8_1X8:
915 case MEDIA_BUS_FMT_SGRBG8_1X8:
916 case MEDIA_BUS_FMT_SGBRG8_1X8:
917 case MEDIA_BUS_FMT_SBGGR8_1X8:
918 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
919 IMX219_REG_VALUE_16BIT,
920 IMX219_BINNING_2X2_ANALOG);
921
922 case MEDIA_BUS_FMT_SRGGB10_1X10:
923 case MEDIA_BUS_FMT_SGRBG10_1X10:
924 case MEDIA_BUS_FMT_SGBRG10_1X10:
925 case MEDIA_BUS_FMT_SBGGR10_1X10:
926 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
927 IMX219_REG_VALUE_16BIT,
928 IMX219_BINNING_2X2);
929 }
930
931 return -EINVAL;
932 }
933
934 static const struct v4l2_rect *
__imx219_get_pad_crop(struct imx219 * imx219,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)935 __imx219_get_pad_crop(struct imx219 *imx219,
936 struct v4l2_subdev_state *sd_state,
937 unsigned int pad, enum v4l2_subdev_format_whence which)
938 {
939 switch (which) {
940 case V4L2_SUBDEV_FORMAT_TRY:
941 return v4l2_subdev_get_try_crop(&imx219->sd, sd_state, pad);
942 case V4L2_SUBDEV_FORMAT_ACTIVE:
943 return &imx219->mode->crop;
944 }
945
946 return NULL;
947 }
948
imx219_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)949 static int imx219_get_selection(struct v4l2_subdev *sd,
950 struct v4l2_subdev_state *sd_state,
951 struct v4l2_subdev_selection *sel)
952 {
953 switch (sel->target) {
954 case V4L2_SEL_TGT_CROP: {
955 struct imx219 *imx219 = to_imx219(sd);
956
957 mutex_lock(&imx219->mutex);
958 sel->r = *__imx219_get_pad_crop(imx219, sd_state, sel->pad,
959 sel->which);
960 mutex_unlock(&imx219->mutex);
961
962 return 0;
963 }
964
965 case V4L2_SEL_TGT_NATIVE_SIZE:
966 sel->r.top = 0;
967 sel->r.left = 0;
968 sel->r.width = IMX219_NATIVE_WIDTH;
969 sel->r.height = IMX219_NATIVE_HEIGHT;
970
971 return 0;
972
973 case V4L2_SEL_TGT_CROP_DEFAULT:
974 case V4L2_SEL_TGT_CROP_BOUNDS:
975 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
976 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
977 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
978 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
979
980 return 0;
981 }
982
983 return -EINVAL;
984 }
985
imx219_configure_lanes(struct imx219 * imx219)986 static int imx219_configure_lanes(struct imx219 *imx219)
987 {
988 return imx219_write_reg(imx219, IMX219_REG_CSI_LANE_MODE,
989 IMX219_REG_VALUE_08BIT, (imx219->lanes == 2) ?
990 IMX219_CSI_2_LANE_MODE : IMX219_CSI_4_LANE_MODE);
991 };
992
imx219_start_streaming(struct imx219 * imx219)993 static int imx219_start_streaming(struct imx219 *imx219)
994 {
995 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
996 const struct imx219_reg_list *reg_list;
997 int ret;
998
999 ret = pm_runtime_resume_and_get(&client->dev);
1000 if (ret < 0)
1001 return ret;
1002
1003 /* Send all registers that are common to all modes */
1004 ret = imx219_write_regs(imx219, imx219_common_regs, ARRAY_SIZE(imx219_common_regs));
1005 if (ret) {
1006 dev_err(&client->dev, "%s failed to send mfg header\n", __func__);
1007 goto err_rpm_put;
1008 }
1009
1010 /* Configure two or four Lane mode */
1011 ret = imx219_configure_lanes(imx219);
1012 if (ret) {
1013 dev_err(&client->dev, "%s failed to configure lanes\n", __func__);
1014 goto err_rpm_put;
1015 }
1016
1017 /* Apply default values of current mode */
1018 reg_list = &imx219->mode->reg_list;
1019 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs);
1020 if (ret) {
1021 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1022 goto err_rpm_put;
1023 }
1024
1025 ret = imx219_set_framefmt(imx219);
1026 if (ret) {
1027 dev_err(&client->dev, "%s failed to set frame format: %d\n",
1028 __func__, ret);
1029 goto err_rpm_put;
1030 }
1031
1032 ret = imx219_set_binning(imx219);
1033 if (ret) {
1034 dev_err(&client->dev, "%s failed to set binning: %d\n",
1035 __func__, ret);
1036 goto err_rpm_put;
1037 }
1038
1039 /* Apply customized values from user */
1040 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
1041 if (ret)
1042 goto err_rpm_put;
1043
1044 /* set stream on register */
1045 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1046 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1047 if (ret)
1048 goto err_rpm_put;
1049
1050 /* vflip and hflip cannot change during streaming */
1051 __v4l2_ctrl_grab(imx219->vflip, true);
1052 __v4l2_ctrl_grab(imx219->hflip, true);
1053
1054 return 0;
1055
1056 err_rpm_put:
1057 pm_runtime_put(&client->dev);
1058 return ret;
1059 }
1060
imx219_stop_streaming(struct imx219 * imx219)1061 static void imx219_stop_streaming(struct imx219 *imx219)
1062 {
1063 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1064 int ret;
1065
1066 /* set stream off register */
1067 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1068 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1069 if (ret)
1070 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1071
1072 __v4l2_ctrl_grab(imx219->vflip, false);
1073 __v4l2_ctrl_grab(imx219->hflip, false);
1074
1075 pm_runtime_put(&client->dev);
1076 }
1077
imx219_set_stream(struct v4l2_subdev * sd,int enable)1078 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
1079 {
1080 struct imx219 *imx219 = to_imx219(sd);
1081 int ret = 0;
1082
1083 mutex_lock(&imx219->mutex);
1084 if (imx219->streaming == enable) {
1085 mutex_unlock(&imx219->mutex);
1086 return 0;
1087 }
1088
1089 if (enable) {
1090 /*
1091 * Apply default & customized values
1092 * and then start streaming.
1093 */
1094 ret = imx219_start_streaming(imx219);
1095 if (ret)
1096 goto err_unlock;
1097 } else {
1098 imx219_stop_streaming(imx219);
1099 }
1100
1101 imx219->streaming = enable;
1102
1103 mutex_unlock(&imx219->mutex);
1104
1105 return ret;
1106
1107 err_unlock:
1108 mutex_unlock(&imx219->mutex);
1109
1110 return ret;
1111 }
1112
1113 /* Power/clock management functions */
imx219_power_on(struct device * dev)1114 static int imx219_power_on(struct device *dev)
1115 {
1116 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1117 struct imx219 *imx219 = to_imx219(sd);
1118 int ret;
1119
1120 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
1121 imx219->supplies);
1122 if (ret) {
1123 dev_err(dev, "%s: failed to enable regulators\n",
1124 __func__);
1125 return ret;
1126 }
1127
1128 ret = clk_prepare_enable(imx219->xclk);
1129 if (ret) {
1130 dev_err(dev, "%s: failed to enable clock\n",
1131 __func__);
1132 goto reg_off;
1133 }
1134
1135 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
1136 usleep_range(IMX219_XCLR_MIN_DELAY_US,
1137 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
1138
1139 return 0;
1140
1141 reg_off:
1142 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1143
1144 return ret;
1145 }
1146
imx219_power_off(struct device * dev)1147 static int imx219_power_off(struct device *dev)
1148 {
1149 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1150 struct imx219 *imx219 = to_imx219(sd);
1151
1152 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
1153 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1154 clk_disable_unprepare(imx219->xclk);
1155
1156 return 0;
1157 }
1158
imx219_suspend(struct device * dev)1159 static int __maybe_unused imx219_suspend(struct device *dev)
1160 {
1161 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1162 struct imx219 *imx219 = to_imx219(sd);
1163
1164 if (imx219->streaming)
1165 imx219_stop_streaming(imx219);
1166
1167 return 0;
1168 }
1169
imx219_resume(struct device * dev)1170 static int __maybe_unused imx219_resume(struct device *dev)
1171 {
1172 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1173 struct imx219 *imx219 = to_imx219(sd);
1174 int ret;
1175
1176 if (imx219->streaming) {
1177 ret = imx219_start_streaming(imx219);
1178 if (ret)
1179 goto error;
1180 }
1181
1182 return 0;
1183
1184 error:
1185 imx219_stop_streaming(imx219);
1186 imx219->streaming = false;
1187
1188 return ret;
1189 }
1190
imx219_get_regulators(struct imx219 * imx219)1191 static int imx219_get_regulators(struct imx219 *imx219)
1192 {
1193 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1194 unsigned int i;
1195
1196 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1197 imx219->supplies[i].supply = imx219_supply_name[i];
1198
1199 return devm_regulator_bulk_get(&client->dev,
1200 IMX219_NUM_SUPPLIES,
1201 imx219->supplies);
1202 }
1203
1204 /* Verify chip ID */
imx219_identify_module(struct imx219 * imx219)1205 static int imx219_identify_module(struct imx219 *imx219)
1206 {
1207 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1208 int ret;
1209 u32 val;
1210
1211 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
1212 IMX219_REG_VALUE_16BIT, &val);
1213 if (ret) {
1214 dev_err(&client->dev, "failed to read chip id %x\n",
1215 IMX219_CHIP_ID);
1216 return ret;
1217 }
1218
1219 if (val != IMX219_CHIP_ID) {
1220 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1221 IMX219_CHIP_ID, val);
1222 return -EIO;
1223 }
1224
1225 return 0;
1226 }
1227
1228 static const struct v4l2_subdev_core_ops imx219_core_ops = {
1229 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1230 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1231 };
1232
1233 static const struct v4l2_subdev_video_ops imx219_video_ops = {
1234 .s_stream = imx219_set_stream,
1235 };
1236
1237 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
1238 .enum_mbus_code = imx219_enum_mbus_code,
1239 .get_fmt = imx219_get_pad_format,
1240 .set_fmt = imx219_set_pad_format,
1241 .get_selection = imx219_get_selection,
1242 .enum_frame_size = imx219_enum_frame_size,
1243 };
1244
1245 static const struct v4l2_subdev_ops imx219_subdev_ops = {
1246 .core = &imx219_core_ops,
1247 .video = &imx219_video_ops,
1248 .pad = &imx219_pad_ops,
1249 };
1250
1251 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
1252 .open = imx219_open,
1253 };
1254
imx219_get_pixel_rate(struct imx219 * imx219)1255 static unsigned long imx219_get_pixel_rate(struct imx219 *imx219)
1256 {
1257 return (imx219->lanes == 2) ? IMX219_PIXEL_RATE : IMX219_PIXEL_RATE_4LANE;
1258 }
1259
1260 /* Initialize control handlers */
imx219_init_controls(struct imx219 * imx219)1261 static int imx219_init_controls(struct imx219 *imx219)
1262 {
1263 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1264 struct v4l2_ctrl_handler *ctrl_hdlr;
1265 unsigned int height = imx219->mode->height;
1266 struct v4l2_fwnode_device_properties props;
1267 int exposure_max, exposure_def, hblank;
1268 int i, ret;
1269
1270 ctrl_hdlr = &imx219->ctrl_handler;
1271 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
1272 if (ret)
1273 return ret;
1274
1275 mutex_init(&imx219->mutex);
1276 ctrl_hdlr->lock = &imx219->mutex;
1277
1278 /* By default, PIXEL_RATE is read only */
1279 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1280 V4L2_CID_PIXEL_RATE,
1281 imx219_get_pixel_rate(imx219),
1282 imx219_get_pixel_rate(imx219), 1,
1283 imx219_get_pixel_rate(imx219));
1284
1285 imx219->link_freq =
1286 v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops,
1287 V4L2_CID_LINK_FREQ,
1288 ARRAY_SIZE(imx219_link_freq_menu) - 1, 0,
1289 (imx219->lanes == 2) ? imx219_link_freq_menu :
1290 imx219_link_freq_4lane_menu);
1291 if (imx219->link_freq)
1292 imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1293
1294 /* Initial vblank/hblank/exposure parameters based on current mode */
1295 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1296 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
1297 IMX219_VTS_MAX - height, 1,
1298 imx219->mode->vts_def - height);
1299 hblank = IMX219_PPL_DEFAULT - imx219->mode->width;
1300 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1301 V4L2_CID_HBLANK, hblank, hblank,
1302 1, hblank);
1303 if (imx219->hblank)
1304 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1305 exposure_max = imx219->mode->vts_def - 4;
1306 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
1307 exposure_max : IMX219_EXPOSURE_DEFAULT;
1308 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1309 V4L2_CID_EXPOSURE,
1310 IMX219_EXPOSURE_MIN, exposure_max,
1311 IMX219_EXPOSURE_STEP,
1312 exposure_def);
1313
1314 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1315 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
1316 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
1317
1318 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1319 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
1320 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
1321
1322 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1323 V4L2_CID_HFLIP, 0, 1, 1, 0);
1324 if (imx219->hflip)
1325 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1326
1327 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1328 V4L2_CID_VFLIP, 0, 1, 1, 0);
1329 if (imx219->vflip)
1330 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1331
1332 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
1333 V4L2_CID_TEST_PATTERN,
1334 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
1335 0, 0, imx219_test_pattern_menu);
1336 for (i = 0; i < 4; i++) {
1337 /*
1338 * The assumption is that
1339 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1340 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
1341 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1342 */
1343 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1344 V4L2_CID_TEST_PATTERN_RED + i,
1345 IMX219_TESTP_COLOUR_MIN,
1346 IMX219_TESTP_COLOUR_MAX,
1347 IMX219_TESTP_COLOUR_STEP,
1348 IMX219_TESTP_COLOUR_MAX);
1349 /* The "Solid color" pattern is white by default */
1350 }
1351
1352 if (ctrl_hdlr->error) {
1353 ret = ctrl_hdlr->error;
1354 dev_err(&client->dev, "%s control init failed (%d)\n",
1355 __func__, ret);
1356 goto error;
1357 }
1358
1359 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1360 if (ret)
1361 goto error;
1362
1363 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
1364 &props);
1365 if (ret)
1366 goto error;
1367
1368 imx219->sd.ctrl_handler = ctrl_hdlr;
1369
1370 return 0;
1371
1372 error:
1373 v4l2_ctrl_handler_free(ctrl_hdlr);
1374 mutex_destroy(&imx219->mutex);
1375
1376 return ret;
1377 }
1378
imx219_free_controls(struct imx219 * imx219)1379 static void imx219_free_controls(struct imx219 *imx219)
1380 {
1381 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
1382 mutex_destroy(&imx219->mutex);
1383 }
1384
imx219_check_hwcfg(struct device * dev,struct imx219 * imx219)1385 static int imx219_check_hwcfg(struct device *dev, struct imx219 *imx219)
1386 {
1387 struct fwnode_handle *endpoint;
1388 struct v4l2_fwnode_endpoint ep_cfg = {
1389 .bus_type = V4L2_MBUS_CSI2_DPHY
1390 };
1391 int ret = -EINVAL;
1392
1393 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1394 if (!endpoint) {
1395 dev_err(dev, "endpoint node not found\n");
1396 return -EINVAL;
1397 }
1398
1399 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1400 dev_err(dev, "could not parse endpoint\n");
1401 goto error_out;
1402 }
1403
1404 /* Check the number of MIPI CSI2 data lanes */
1405 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
1406 ep_cfg.bus.mipi_csi2.num_data_lanes != 4) {
1407 dev_err(dev, "only 2 or 4 data lanes are currently supported\n");
1408 goto error_out;
1409 }
1410 imx219->lanes = ep_cfg.bus.mipi_csi2.num_data_lanes;
1411
1412 /* Check the link frequency set in device tree */
1413 if (!ep_cfg.nr_of_link_frequencies) {
1414 dev_err(dev, "link-frequency property not found in DT\n");
1415 goto error_out;
1416 }
1417
1418 if (ep_cfg.nr_of_link_frequencies != 1 ||
1419 (ep_cfg.link_frequencies[0] != ((imx219->lanes == 2) ?
1420 IMX219_DEFAULT_LINK_FREQ : IMX219_DEFAULT_LINK_FREQ_4LANE))) {
1421 dev_err(dev, "Link frequency not supported: %lld\n",
1422 ep_cfg.link_frequencies[0]);
1423 goto error_out;
1424 }
1425
1426 ret = 0;
1427
1428 error_out:
1429 v4l2_fwnode_endpoint_free(&ep_cfg);
1430 fwnode_handle_put(endpoint);
1431
1432 return ret;
1433 }
1434
imx219_probe(struct i2c_client * client)1435 static int imx219_probe(struct i2c_client *client)
1436 {
1437 struct device *dev = &client->dev;
1438 struct imx219 *imx219;
1439 int ret;
1440
1441 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1442 if (!imx219)
1443 return -ENOMEM;
1444
1445 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1446
1447 /* Check the hardware configuration in device tree */
1448 if (imx219_check_hwcfg(dev, imx219))
1449 return -EINVAL;
1450
1451 /* Get system clock (xclk) */
1452 imx219->xclk = devm_clk_get(dev, NULL);
1453 if (IS_ERR(imx219->xclk)) {
1454 dev_err(dev, "failed to get xclk\n");
1455 return PTR_ERR(imx219->xclk);
1456 }
1457
1458 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1459 if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1460 dev_err(dev, "xclk frequency not supported: %d Hz\n",
1461 imx219->xclk_freq);
1462 return -EINVAL;
1463 }
1464
1465 ret = imx219_get_regulators(imx219);
1466 if (ret) {
1467 dev_err(dev, "failed to get regulators\n");
1468 return ret;
1469 }
1470
1471 /* Request optional enable pin */
1472 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1473 GPIOD_OUT_HIGH);
1474
1475 /*
1476 * The sensor must be powered for imx219_identify_module()
1477 * to be able to read the CHIP_ID register
1478 */
1479 ret = imx219_power_on(dev);
1480 if (ret)
1481 return ret;
1482
1483 ret = imx219_identify_module(imx219);
1484 if (ret)
1485 goto error_power_off;
1486
1487 /* Set default mode to max resolution */
1488 imx219->mode = &supported_modes[0];
1489
1490 /* sensor doesn't enter LP-11 state upon power up until and unless
1491 * streaming is started, so upon power up switch the modes to:
1492 * streaming -> standby
1493 */
1494 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1495 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1496 if (ret < 0)
1497 goto error_power_off;
1498 usleep_range(100, 110);
1499
1500 /* put sensor back to standby mode */
1501 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1502 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1503 if (ret < 0)
1504 goto error_power_off;
1505 usleep_range(100, 110);
1506
1507 ret = imx219_init_controls(imx219);
1508 if (ret)
1509 goto error_power_off;
1510
1511 /* Initialize subdev */
1512 imx219->sd.internal_ops = &imx219_internal_ops;
1513 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1514 V4L2_SUBDEV_FL_HAS_EVENTS;
1515 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1516
1517 /* Initialize source pad */
1518 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1519
1520 /* Initialize default format */
1521 imx219_set_default_format(imx219);
1522
1523 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1524 if (ret) {
1525 dev_err(dev, "failed to init entity pads: %d\n", ret);
1526 goto error_handler_free;
1527 }
1528
1529 ret = v4l2_async_register_subdev_sensor(&imx219->sd);
1530 if (ret < 0) {
1531 dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1532 goto error_media_entity;
1533 }
1534
1535 /* Enable runtime PM and turn off the device */
1536 pm_runtime_set_active(dev);
1537 pm_runtime_enable(dev);
1538 pm_runtime_idle(dev);
1539
1540 return 0;
1541
1542 error_media_entity:
1543 media_entity_cleanup(&imx219->sd.entity);
1544
1545 error_handler_free:
1546 imx219_free_controls(imx219);
1547
1548 error_power_off:
1549 imx219_power_off(dev);
1550
1551 return ret;
1552 }
1553
imx219_remove(struct i2c_client * client)1554 static void imx219_remove(struct i2c_client *client)
1555 {
1556 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1557 struct imx219 *imx219 = to_imx219(sd);
1558
1559 v4l2_async_unregister_subdev(sd);
1560 media_entity_cleanup(&sd->entity);
1561 imx219_free_controls(imx219);
1562
1563 pm_runtime_disable(&client->dev);
1564 if (!pm_runtime_status_suspended(&client->dev))
1565 imx219_power_off(&client->dev);
1566 pm_runtime_set_suspended(&client->dev);
1567 }
1568
1569 static const struct of_device_id imx219_dt_ids[] = {
1570 { .compatible = "sony,imx219" },
1571 { /* sentinel */ }
1572 };
1573 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1574
1575 static const struct dev_pm_ops imx219_pm_ops = {
1576 SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume)
1577 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1578 };
1579
1580 static struct i2c_driver imx219_i2c_driver = {
1581 .driver = {
1582 .name = "imx219",
1583 .of_match_table = imx219_dt_ids,
1584 .pm = &imx219_pm_ops,
1585 },
1586 .probe_new = imx219_probe,
1587 .remove = imx219_remove,
1588 };
1589
1590 module_i2c_driver(imx219_i2c_driver);
1591
1592 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1593 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1594 MODULE_LICENSE("GPL v2");
1595